KR970024110A - 반도체 장치 및 그의 제조방법(semiconductor device and method for manufacturing the same) - Google Patents

반도체 장치 및 그의 제조방법(semiconductor device and method for manufacturing the same) Download PDF

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KR970024110A
KR970024110A KR1019960045455A KR19960045455A KR970024110A KR 970024110 A KR970024110 A KR 970024110A KR 1019960045455 A KR1019960045455 A KR 1019960045455A KR 19960045455 A KR19960045455 A KR 19960045455A KR 970024110 A KR970024110 A KR 970024110A
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lead
semiconductor chip
semiconductor device
manufacturing
center
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KR1019960045455A
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KR100206082B1 (ko
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가즈히로 이이노
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가네꼬 하사시
닛뽕덴끼 가부시끼가이샤
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

본 발명은 박형화에 적합한 수지밀봉형 반도체 장치 및 그의 제조방법을 제공하는 것을 목적으로 하며, 이를 위해 반도체 장치(5)는 중심부에서 방사상으로 연장됨과 동시에 그 도중에 절단부(11a)를 가지는 복수의 내부 리드(11)의 중심부측에 아일런드부(10)가 구성되고, 아일런드부(10)가 리프트 리드(12)에 지지됨과 동시에 아일런드부(10) 상에 반도체 칩이 탑재되고, 반도체 칩(7) 상의 전극(16)과 내부 리드(11)의 주변부측이 금선(9)에 의하여 전기적으로 접속됨과 동시에, 이들이 수지(8)로 밀봉되어 있다.

Description

반도체 장치 및 그의 제조방법(SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도 2는 동 횡단면도.

Claims (3)

  1. 중심부에서 방사상으로 연장됨과 동시에 그 도중에 절단부를 가지는 복수의 내부 리드의 상기 절단부보다 중심부측에 아일런드부가 구성되고, 이 아일런드부가 리프트 리드에 지지됨과 동시에 아일런드부 상에 반도체 칩이 탑재되고, 이 반도체 칩 상의 전극과 상기 내부 리드의 절단부보다 주변부측이 전기적으로 접속됨과 동시에, 이들 내부 리드, 리프트 리드, 반도체 칩이 수지로 밀봉된 것을 특징으로 하는 반도체 장치.
  2. 중심부에서 방사상으로 연장된 복수의 내부 리드와 리프트 리드를 가지는 리드 프레임을 사용하고, 상기 리프트 리드를 제외하고 상기 각 내부 리드를 반도체 칩을 상기 중심부 상에 배치하였을 때에 그 사이즈에 맞도록 절단한 후, 상기 중심부 상에 반도체 칩을 탑재하고, 상기 반도체 칩 상의 전극과 상기 내부 리드의 절단부보다 주변부측 사이의 와이어 본딩을 실시한 후, 수지밀봉을 행하는 것을 특징으로 하는 반도체 장치의 제조방법.
  3. 제2항에 있어서, 상기 리드 프레임에 위치결정부를 형성하여 두고, 상기 내부 리드를 절단할 때에 사용하는 금형의 상기 리드 프레임에 대한 위치결정을 상기 위치결정부를 이용하여 행하는 것을 특징으로 하는 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960045455A 1995-10-11 1996-10-11 반도체 장치 및 그의 제조방법 KR100206082B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP26309795A JP2746224B2 (ja) 1995-10-11 1995-10-11 半導体装置およびその製造方法
JP95-263097 1995-10-11

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Publication Number Publication Date
KR970024110A true KR970024110A (ko) 1997-05-30
KR100206082B1 KR100206082B1 (ko) 1999-07-01

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KR1019960045455A KR100206082B1 (ko) 1995-10-11 1996-10-11 반도체 장치 및 그의 제조방법

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JP (1) JP2746224B2 (ko)
KR (1) KR100206082B1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5907769A (en) * 1996-12-30 1999-05-25 Micron Technology, Inc. Leads under chip in conventional IC package
JP3085278B2 (ja) * 1998-05-01 2000-09-04 日本電気株式会社 半導体装置の製造方法および半導体製造装置
US6075283A (en) 1998-07-06 2000-06-13 Micron Technology, Inc. Downset lead frame for semiconductor packages
US6218726B1 (en) * 1999-07-08 2001-04-17 Industrial Technology Research Institute Built-in stress pattern on IC dies and method of forming
SG112799A1 (en) 2000-10-09 2005-07-28 St Assembly Test Services Ltd Leaded semiconductor packages and method of trimming and singulating such packages
US6686258B2 (en) 2000-11-02 2004-02-03 St Assembly Test Services Ltd. Method of trimming and singulating leaded semiconductor packages
JP3402323B2 (ja) 2000-12-25 2003-05-06 松下電工株式会社 ヘアードライヤー
US6919620B1 (en) * 2002-09-17 2005-07-19 Amkor Technology, Inc. Compact flash memory card with clamshell leadframe

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US4289922A (en) * 1979-09-04 1981-09-15 Plessey Incorporated Integrated circuit package and lead frame
JPS61216354A (ja) * 1985-03-20 1986-09-26 Shinko Electric Ind Co Ltd リ−ドフレ−ムの製造方法
JPH01120354U (ko) * 1988-02-10 1989-08-15
JPH04146658A (ja) * 1990-10-09 1992-05-20 Toshiba Corp リードフレーム
US5185653A (en) * 1990-11-08 1993-02-09 National Semiconductor Corporation O-ring package
JPH04317364A (ja) * 1991-04-16 1992-11-09 Sony Corp 樹脂封止型半導体装置とそれの製造に使用するリードフレーム
JPH05326815A (ja) * 1992-05-25 1993-12-10 Matsushita Electron Corp 半導体装置用リードフレーム
JP2772897B2 (ja) * 1992-11-30 1998-07-09 太陽誘電株式会社 リ−ドフレ−ム、およびリ−ドフレ−ムを用いた接続端子の作製方法
JPH07130938A (ja) * 1993-10-29 1995-05-19 Nec Corp 半導体集積回路用リードフレーム

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US5945731A (en) 1999-08-31
JPH09107062A (ja) 1997-04-22
KR100206082B1 (ko) 1999-07-01
JP2746224B2 (ja) 1998-05-06

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