KR960035649A - 플래쉬이이피롬셀의 문턱전압 자동 검증회로 - Google Patents

플래쉬이이피롬셀의 문턱전압 자동 검증회로 Download PDF

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Publication number
KR960035649A
KR960035649A KR1019950005924A KR19950005924A KR960035649A KR 960035649 A KR960035649 A KR 960035649A KR 1019950005924 A KR1019950005924 A KR 1019950005924A KR 19950005924 A KR19950005924 A KR 19950005924A KR 960035649 A KR960035649 A KR 960035649A
Authority
KR
South Korea
Prior art keywords
threshold voltage
cell
verification circuit
flash
automatic verification
Prior art date
Application number
KR1019950005924A
Other languages
English (en)
Other versions
KR0145382B1 (ko
Inventor
송복남
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950005924A priority Critical patent/KR0145382B1/ko
Priority to GB9910010A priority patent/GB2337619B/en
Priority to GB9605762A priority patent/GB2299190B/en
Priority to JP6478996A priority patent/JP3225258B2/ja
Priority to US08/622,037 priority patent/US5699296A/en
Publication of KR960035649A publication Critical patent/KR960035649A/ko
Application granted granted Critical
Publication of KR0145382B1 publication Critical patent/KR0145382B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3477—Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

본 발명은 플래쉬 이이피롬(FLASH EEPROM) 셀의 문턱전압 자동 검증 회로에 관한 것으로서, 플래쉬 이이피롬 셀의 프로그램 및 소거모드시 셀의 플로팅게이트단자로 주입되는 전하량의 변화에따라 문턱전압이 자동으로 검증되도록 하므로써, 셀의 프로그램 및 소거시간을 크게 향상시키고, 스택(Stack) 형태의 셀에서 흔히 나타나는 오버이레이즈(Over erase) 문제를 해결하도록 하며, 별도의 문턱전압 검증회로가 필요없는 플래쉬 이이피롬 셀의 문턱전압 자동검증회로에 관한 것이다.

Description

플래쉬 이이피롬셀의 문턱전압 자동 검증회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A 및 2B도는 본 발명에 따른 플래쉬 이이피롬셀의 문턱전압 자동 검증 회로도, 제3A 및 제3B도는 제2A 및 2B도를 설명하기 위한 플래쉬 이이피롬셀의 등가회로.

Claims (1)

  1. 플래쉬 이이피롬셀에 있어서, 프로그램 및 소거모드시에 변환되는 셀전류에 의해 문턱전압이 자동으로 검증 되도록 하기 위해 전원 및 접지간에 저항 및 콘트롤게이트 전압을 입력으로 하는 플래쉬 이이피롬셀이 직렬로 접속되며, 상기 플래쉬 이이피롬이셀의 드레인 및 저항간의 접속점으로부터 반전게이트를 통해 문턱전압이 자동으로 검증되도록 구성되는 것을 특징으로 하는 플래쉬 이이피롬셀의 문턱전압 자동검증회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950005924A 1995-03-21 1995-03-21 플래쉬 이이피롬셀의 문턱전압 자동 검증회로 KR0145382B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019950005924A KR0145382B1 (ko) 1995-03-21 1995-03-21 플래쉬 이이피롬셀의 문턱전압 자동 검증회로
GB9910010A GB2337619B (en) 1995-03-21 1996-03-19 Threshold voltage verification circuit of a non-volatile memory cell and program and erasure verification method using the same
GB9605762A GB2299190B (en) 1995-03-21 1996-03-19 Threshold voltage verification circuit of a non-volatile memory cell
JP6478996A JP3225258B2 (ja) 1995-03-21 1996-03-21 不揮発性メモリセルのしきい値電圧検出回路及びこれを用いた不揮発性メモリセルのプログラム及び消去状態の確認方法
US08/622,037 US5699296A (en) 1995-03-21 1996-03-21 Threshold voltage verification circuit of a non-volatile memory cell and program and erasure verification method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950005924A KR0145382B1 (ko) 1995-03-21 1995-03-21 플래쉬 이이피롬셀의 문턱전압 자동 검증회로

Publications (2)

Publication Number Publication Date
KR960035649A true KR960035649A (ko) 1996-10-24
KR0145382B1 KR0145382B1 (ko) 1998-08-17

Family

ID=19410237

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950005924A KR0145382B1 (ko) 1995-03-21 1995-03-21 플래쉬 이이피롬셀의 문턱전압 자동 검증회로

Country Status (4)

Country Link
US (1) US5699296A (ko)
JP (1) JP3225258B2 (ko)
KR (1) KR0145382B1 (ko)
GB (1) GB2299190B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100551883B1 (ko) * 1998-12-29 2006-05-03 주식회사 하이닉스반도체 플래쉬 메모리 셀의 프로그램 회로

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0833348B1 (en) * 1996-09-30 2003-07-09 STMicroelectronics S.r.l. Method and circuit for checking multilevel programming of floating-gate nonvolatile memory cells, particlarly flash cells
JPH10302482A (ja) * 1997-02-27 1998-11-13 Sanyo Electric Co Ltd 半導体メモリ
JP4002710B2 (ja) * 2000-01-31 2007-11-07 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US6331954B1 (en) * 2001-06-28 2001-12-18 Advanced Micro Devices, Inc. Determination of misalignment for floating gates near a gate stack bending point in array of flash memory cells
US7755931B2 (en) * 2005-08-02 2010-07-13 Nec Corporation Magnetic random access memory and operation method thereof
WO2008012871A1 (fr) * 2006-07-25 2008-01-31 Fujitsu Limited Dispositif à mémoire à semi-conducteur rémanente
US8120966B2 (en) * 2009-02-05 2012-02-21 Aplus Flash Technology, Inc. Method and apparatus for management of over-erasure in NAND-based NOR-type flash memory
TWI784531B (zh) 2021-05-19 2022-11-21 周文三 空氣壓縮機之馬達結合定位裝置

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
JPS6245800U (ko) * 1985-09-03 1987-03-19
FR2599176A1 (fr) * 1986-05-23 1987-11-27 Eurotechnique Sa Memoire morte programmable electriquement
US5053990A (en) * 1988-02-17 1991-10-01 Intel Corporation Program/erase selection for flash memory
JP2558904B2 (ja) * 1990-01-19 1996-11-27 株式会社東芝 半導体集積回路
JPH043396A (ja) * 1990-04-20 1992-01-08 Mitsubishi Electric Corp Ｉｃカード
US5265059A (en) * 1991-05-10 1993-11-23 Intel Corporation Circuitry and method for discharging a drain of a cell of a non-volatile semiconductor memory
US5557572A (en) * 1992-04-24 1996-09-17 Nippon Steel Corporation Non-volatile semiconductor memory device
JPH0644791A (ja) * 1992-05-08 1994-02-18 Seiko Epson Corp 不揮発性半導体装置
US5371706A (en) * 1992-08-20 1994-12-06 Texas Instruments Incorporated Circuit and method for sensing depletion of memory cells
US5463586A (en) * 1993-05-28 1995-10-31 Macronix International Co., Ltd. Erase and program verification circuit for non-volatile memory
US5572465A (en) * 1995-05-25 1996-11-05 Intel Corporation Power supply configured sensing scheme for flash EEPROM

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100551883B1 (ko) * 1998-12-29 2006-05-03 주식회사 하이닉스반도체 플래쉬 메모리 셀의 프로그램 회로

Also Published As

Publication number Publication date
GB2299190B (en) 2000-03-01
JPH08335400A (ja) 1996-12-17
GB2299190A (en) 1996-09-25
JP3225258B2 (ja) 2001-11-05
KR0145382B1 (ko) 1998-08-17
GB9605762D0 (en) 1996-05-22
US5699296A (en) 1997-12-16

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