KR960009542B1 - Viterbi decoder in code division multiple access - Google Patents

Viterbi decoder in code division multiple access Download PDF

Info

Publication number
KR960009542B1
KR960009542B1 KR93028478A KR930028478A KR960009542B1 KR 960009542 B1 KR960009542 B1 KR 960009542B1 KR 93028478 A KR93028478 A KR 93028478A KR 930028478 A KR930028478 A KR 930028478A KR 960009542 B1 KR960009542 B1 KR 960009542B1
Authority
KR
South Korea
Prior art keywords
multiple access
division multiple
code division
bit
viterbi decoder
Prior art date
Application number
KR93028478A
Other languages
English (en)
Other versions
KR950022261A (ko
Inventor
Se-Hyun Park
Inn-San Joon
Jin-Jong Cha
Original Assignee
Korea Electronics Telecomm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Korea Electronics Telecomm filed Critical Korea Electronics Telecomm
Priority to KR93028478A priority Critical patent/KR960009542B1/ko
Publication of KR950022261A publication Critical patent/KR950022261A/ko
Application granted granted Critical
Publication of KR960009542B1 publication Critical patent/KR960009542B1/ko

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • H03M13/6505Memory efficient implementations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
KR93028478A 1993-12-18 1993-12-18 Viterbi decoder in code division multiple access KR960009542B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93028478A KR960009542B1 (en) 1993-12-18 1993-12-18 Viterbi decoder in code division multiple access

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93028478A KR960009542B1 (en) 1993-12-18 1993-12-18 Viterbi decoder in code division multiple access

Publications (2)

Publication Number Publication Date
KR950022261A KR950022261A (ko) 1995-07-28
KR960009542B1 true KR960009542B1 (en) 1996-07-20

Family

ID=19371643

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93028478A KR960009542B1 (en) 1993-12-18 1993-12-18 Viterbi decoder in code division multiple access

Country Status (1)

Country Link
KR (1) KR960009542B1 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100386244B1 (ko) * 1998-01-22 2004-01-24 엘지전자 주식회사 비터비 디코더
KR100306580B1 (ko) * 1998-09-24 2001-11-30 구자홍 비터비디코더의경로메모리장치

Also Published As

Publication number Publication date
KR950022261A (ko) 1995-07-28

Similar Documents

Publication Publication Date Title
KR930004862B1 (ko) 상태 평가량 기억장치
TW280914B (en) High-density read-only memory
KR850003602A (ko) 데이터 프로세싱 시스템 및 수록방법
US5119092A (en) Apparatus for encoding, decoding, and storing waveforms
CA2042798A1 (en) Viterbi decoder
KR960009542B1 (en) Viterbi decoder in code division multiple access
KR960002010A (ko) 순차 액세스 동작을 수행하는 메모리 회로
JP2741836B2 (ja) 適応型可変長符号器
US5126738A (en) Circuit for decoding a sequentially and serially inputted, variable length code
KR0141240B1 (ko) 에러정정용 메모리장치
JP2921286B2 (ja) デジタルトーン発生回路
US20020184456A1 (en) Interleaver memory access apparatus and method of mobile communication system
SU1587599A1 (ru) Устройство дл контрол доменной пам ти
TW377441B (en) Semiconductor memory device having improved row redundancy scheme and method for curing defective cell
JP3183167B2 (ja) 半導体記憶装置
KR950009737A (ko) Rom의 판독 전환 회로
SU1748195A1 (ru) Устройство дл считывани сигналов взаимодействи
US5633941A (en) Centrally controlled voice synthesizer
KR0169787B1 (ko) 캐쉬드 동적 메모리 장치
JP2757716B2 (ja) ハフマン符号復号回路
JPS5766598A (en) Memory circuit having error correction function
KR100215903B1 (ko) 메모리의리드/라이트회로
JPS5723157A (en) Memory address system of microprocessor
JPH0660019A (ja) データ格納方式
KR970051220A (ko) 기억장치의 어드레스 컨트롤 회로

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20090702

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee