KR950010094A - 낮은 누출 전류와 높은 브레이크 다운 전압을 갖는 실리콘 질화막을 형성하는 방법 및 장치 - Google Patents
낮은 누출 전류와 높은 브레이크 다운 전압을 갖는 실리콘 질화막을 형성하는 방법 및 장치 Download PDFInfo
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- KR950010094A KR950010094A KR1019940024165A KR19940024165A KR950010094A KR 950010094 A KR950010094 A KR 950010094A KR 1019940024165 A KR1019940024165 A KR 1019940024165A KR 19940024165 A KR19940024165 A KR 19940024165A KR 950010094 A KR950010094 A KR 950010094A
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- Prior art keywords
- silicon nitride
- nitride film
- substrate
- forming
- gas
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 13
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract 15
- 230000015556 catabolic process Effects 0.000 title abstract 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims abstract description 7
- 239000010408 film Substances 0.000 claims abstract 14
- 239000000758 substrate Substances 0.000 claims abstract 9
- 239000007858 starting material Substances 0.000 claims abstract 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract 4
- 229910052710 silicon Inorganic materials 0.000 claims abstract 4
- 239000010703 silicon Substances 0.000 claims abstract 4
- 238000006557 surface reaction Methods 0.000 claims abstract 3
- 239000010409 thin film Substances 0.000 claims abstract 3
- 238000005121 nitriding Methods 0.000 claims abstract 2
- 239000007789 gas Substances 0.000 claims 8
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims 2
- 229910021529 ammonia Inorganic materials 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 229910000077 silane Inorganic materials 0.000 claims 1
- 239000003990 capacitor Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
신속한 열 질화 공정에 의해 실리콘 기판 상에 제1의 실리콘 질화물 박막을 형성하는 단계와, LPCVD에 의해 제2의 실리콘 질화막을 요구된 두께로 형성하는 단계를 포함하는, 실리콘 기판 및 폴리 실리콘 층 상에 캐패시터 유전 막으로 사용된 실리콘 질화막을 형성하는 방법이 제공된다. LPCVD에서, 표면 반응을 감소시키는 가스가 실리콘 질화막의 개시 물질 가스를 공급하는 수단과는 다른 수단에 의해 실리콘 질화막의 성장 표면에 유입되어, 캐패시터 실리콘 질화막의 브레이크 다운 전압과 누출 전류를 향상시킨다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 공정을 실행하기 위한 LPCVD 장치의 개략 단면도.
제3A도 및 제3B도는 본 발명에 따른 공정의 한 실시예의 특징적 단계들을 도시하는 개략 단면도.
Claims (7)
- LPCVD에 의해 실리콘 기판 및 폴리 실리콘 층 상에 실리콘 질화막을 형성함으로써 반도체 장치를 준비하는 방법에 있어서, 실리콘 질화막의 성장 표면에 특정 가스를 유입하면서 실리콘 질화막의 개시물질 가스들을 공급함으로써 LPCVD를 수행하는 단계를 포함하는 것을 특징으로 하는 방법.
- 실리콘 기판 및 폴리 실리콘 층 상에 실리콘 질화막을 형성하는 방법에 있어서, 신속한 열 질화 공정에 의해 실리콘 기판 상에 제1의 실리콘 질화물 박막을 형성하는 단계; 및 표면 반응을 감소시키는 가스가 실리콘 질화막의 개시 물질 가스들을 공급하는 수단과는 다른 수단에 의해 실리콘 질화막의 성장 표면에 유입되는 LPCVD에 의해 요구된 두께로 제2의 실리콘 질화막을 상기 제1실리콘 질화물 박막상에 형성되는 단계를 포함하는 것을 특징으로 하는 방법.
- 제2항에 있어서, 표면 반응을 감소시키는 상기 가스가 염화 수소인 것을 특징으로 하는 방법.
- 제2항에 있어서, 상기 개시 물질 가스들은 이염화실란(SiH2Cl2)와 암모니아(NH3)를 포함하는 것을 특징으로 하는 방법.
- 제2항에 있어서, 상기 개시 물질 가스가 모노실란(SiH4)와 암모니아(NH3)를 포함하는 것을 특징으로 하는 방법.
- LPCVD를 수행하는 장치에 있어서, 유입구와 유출구를 구비한 진공 챔버; 막이 그 위에 증착될 기판을 보유 지지하기 위해 진공 챔버의 바닥에 제공된 기판홀더; 진공 챔버 내부를 가열하기 위해 진공 챔버를 둘러싸는 히터; 및 기판과 노즐 사이의 거리, 노즐에서 기판까지의 높이 및 각도가 변화될 수 있는 샘플 홀더에 의해 보유 지지된 기판 근처에 가스를 유입하도록 그 끝에 노즐이 있는 흡입관을 포함하는 것을 특징으로 하는 장치.
- 제6항에 있어서, 상기 장치는 챔버의 반대 측에 노즐이 있는 다른 흡입관을 포함하는 것을 특징으로 하는 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP93-234861 | 1993-09-21 | ||
JP5234861A JP2776726B2 (ja) | 1993-09-21 | 1993-09-21 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950010094A true KR950010094A (ko) | 1995-04-26 |
KR0151233B1 KR0151233B1 (ko) | 1998-12-01 |
Family
ID=16977500
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940024165A KR0151233B1 (ko) | 1993-09-21 | 1994-09-22 | 저누출 전류 및 고브레이크다운 전압을 갖는 실리콘 질화막의 형성 방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5663087A (ko) |
JP (1) | JP2776726B2 (ko) |
KR (1) | KR0151233B1 (ko) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3660391B2 (ja) * | 1994-05-27 | 2005-06-15 | 株式会社東芝 | 半導体装置の製造方法 |
JP2871580B2 (ja) * | 1996-03-29 | 1999-03-17 | 日本電気株式会社 | 半導体装置の製造方法 |
US6167837B1 (en) | 1998-01-15 | 2001-01-02 | Torrex Equipment Corp. | Apparatus and method for plasma enhanced chemical vapor deposition (PECVD) in a single wafer reactor |
US20030049372A1 (en) * | 1997-08-11 | 2003-03-13 | Cook Robert C. | High rate deposition at low pressures in a small batch reactor |
US6780464B2 (en) | 1997-08-11 | 2004-08-24 | Torrex Equipment | Thermal gradient enhanced CVD deposition at low pressure |
US7393561B2 (en) * | 1997-08-11 | 2008-07-01 | Applied Materials, Inc. | Method and apparatus for layer by layer deposition of thin films |
US6352593B1 (en) | 1997-08-11 | 2002-03-05 | Torrex Equipment Corp. | Mini-batch process chamber |
TW381187B (en) * | 1997-09-25 | 2000-02-01 | Toshiba Corp | Substrate with conductive films and manufacturing method thereof |
US6566281B1 (en) * | 1997-10-15 | 2003-05-20 | International Business Machines Corporation | Nitrogen-rich barrier layer and structures formed |
KR100498419B1 (ko) * | 1997-12-30 | 2005-09-08 | 삼성전자주식회사 | 반도체소자에사용되는실리콘리치질화막형성방법 |
US6204142B1 (en) | 1998-08-24 | 2001-03-20 | Micron Technology, Inc. | Methods to form electronic devices |
US6528364B1 (en) * | 1998-08-24 | 2003-03-04 | Micron Technology, Inc. | Methods to form electronic devices and methods to form a material over a semiconductive substrate |
US6323098B1 (en) * | 1998-09-11 | 2001-11-27 | Mitsubishi Denki Kabushiki Kaisha | Manufacturing method of a semiconductor device |
WO2000016387A1 (en) * | 1998-09-16 | 2000-03-23 | Torrex Equipment Corporation | High rate silicon nitride deposition method at low pressures |
TW392212B (en) * | 1998-09-21 | 2000-06-01 | Mosel Vitelic Inc | Low pressure silicon nitrides deposition method that can reduce particle production |
US6200844B1 (en) * | 1999-02-12 | 2001-03-13 | United Microelectronics Corp. | Method of manufacturing dielectric film of capacitor in dynamic random access memory |
US6645884B1 (en) * | 1999-07-09 | 2003-11-11 | Applied Materials, Inc. | Method of forming a silicon nitride layer on a substrate |
US6350707B1 (en) * | 1999-09-03 | 2002-02-26 | United Microelectronics Corp. | Method of fabricating capacitor dielectric |
US6323143B1 (en) * | 2000-03-24 | 2001-11-27 | Taiwan Semiconductor Manufacturing Company | Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors |
EP1180791A1 (en) * | 2000-08-18 | 2002-02-20 | Infineon Technologies SC300 GmbH & Co. KG | Method for forming a nitride layer on a semiconductor substrate |
US6465373B1 (en) * | 2000-08-31 | 2002-10-15 | Micron Technology, Inc. | Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer |
US6825081B2 (en) * | 2001-07-24 | 2004-11-30 | Micron Technology, Inc. | Cell nitride nucleation on insulative layers and reduced corner leakage of container capacitors |
US6664198B1 (en) | 2002-07-03 | 2003-12-16 | Micron Technology, Inc. | Method of forming a silicon nitride dielectric layer |
TW577125B (en) * | 2002-10-25 | 2004-02-21 | Nanya Technology Corp | Method for forming a silicon nitride layer |
JP4047766B2 (ja) * | 2003-05-21 | 2008-02-13 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
JP4554378B2 (ja) | 2005-01-21 | 2010-09-29 | 富士通セミコンダクター株式会社 | 窒化膜の形成方法、半導体装置の製造方法及びキャパシタの製造方法 |
WO2007086367A1 (ja) * | 2006-01-27 | 2007-08-02 | Konica Minolta Medical & Graphic, Inc. | Si/Si3N4型ナノ粒子、該ナノ粒子を用いた生体物質標識剤及び前記ナノ粒子の製造方法 |
JP6661487B2 (ja) * | 2016-07-13 | 2020-03-11 | 東京エレクトロン株式会社 | シリコン窒化膜の成膜方法 |
JP6832808B2 (ja) * | 2017-08-09 | 2021-02-24 | 東京エレクトロン株式会社 | シリコン窒化膜の成膜方法及び成膜装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5467770A (en) * | 1977-11-10 | 1979-05-31 | Kokusai Electric Co Ltd | Gas phase growing method |
JP2795904B2 (ja) * | 1989-05-31 | 1998-09-10 | 株式会社東芝 | 半導体装置 |
JPH04171944A (ja) * | 1990-11-06 | 1992-06-19 | Fujitsu Ltd | 気相エピタキシャル成長装置 |
-
1993
- 1993-09-21 JP JP5234861A patent/JP2776726B2/ja not_active Expired - Fee Related
-
1994
- 1994-09-21 US US08/310,279 patent/US5663087A/en not_active Expired - Fee Related
- 1994-09-22 KR KR1019940024165A patent/KR0151233B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0151233B1 (ko) | 1998-12-01 |
JPH0794506A (ja) | 1995-04-07 |
JP2776726B2 (ja) | 1998-07-16 |
US5663087A (en) | 1997-09-02 |
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