KR940027147A - 반도체 회로장치 및 그 펄스 생성방법 - Google Patents

반도체 회로장치 및 그 펄스 생성방법 Download PDF

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Publication number
KR940027147A
KR940027147A KR1019940010743A KR19940010743A KR940027147A KR 940027147 A KR940027147 A KR 940027147A KR 1019940010743 A KR1019940010743 A KR 1019940010743A KR 19940010743 A KR19940010743 A KR 19940010743A KR 940027147 A KR940027147 A KR 940027147A
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South Korea
Prior art keywords
pulse
generating
pulse signals
generated
pulse signal
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KR1019940010743A
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English (en)
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KR0169276B1 (ko
Inventor
야스히사 다케야마
준이치 미야모토
요시히사 이와타
히로노리 반바
히데코 오오다이라
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사토 후미오
가부시키가이샤 도시바
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Publication of KR0169276B1 publication Critical patent/KR0169276B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073—Charge pumps of the Schenkel-type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
    • H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Dc-Dc Converters (AREA)
  • Logic Circuits (AREA)

Abstract

본 발명은 조건이 변화해도 정상인 펄스신호를 발생시킬 수 있는 회로를 구비한 반도체 회로장치 및 그 펄스 생성방법을 제공하도록 하는 것이다.
기본 펄스(Q0, Q1)에 기초해서 서로 위상이 다른 펄스신호(Φ1-Φ4)를 생성하는 펄스신호 생성회로(16-1)와, 펄스신호(Φ1∼Φ4)에 의해 구동되는 차지 펌프회로를 구비한다. 그리고, 생성회로(16-1)를 기본 펄스(Q0, Q1)를 카운트하고, 이 카운트 내용에 기초해서 펄스신호(Φ1∼Φ4)를 생성하도록 구성한 것을 중요한 특징으로 하고 있다. 이 구성이라면, 기본 펄스(Q0, Q1)를 카운트하고, 펄스신호(Φ1∼Φ4)를 생성하기 때문에 조건의 변화 예컨대, 기본펄스의 주파수가 변화해도 각 펄스신호(Φ1∼Φ4)의 동작 타이밍이 항상 일정한 비율로 된다. 따라서 조건이 변화해도 종래와 같이 펄스신호의 매칭이 붕괴되고 목적이 다른 펄스파형 패턴이 발생하거나 하지않고, 항상 정상인 펄스를 생성할 수 있다.

Description

반도체 회로장치 및 그 펄스 생성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 반도체 회로장치가 구비된 구동회로의 회로도, 제2도는 제1도에 나타낸 카운터회로 회로도, 제3도는 본 발명의 제1실시예에 따른 반도체 회로장치 개략적인 구성을 나타낸 블록도.

Claims (2)

  1. 입력신호를 기초로 서로 위상이 다른 복수의 펄스신호를 생성하는 생성수단(14-1∼14-5)과, 상기 복수의 펄스신호에 의해 구동되는 승압수단(12-1∼12-3)을 구비하여 구성되고, 상기 생성수단(14-1∼14-5)이 상기 입력신호를 카운트하고, 이 카운트 내용을 기초로 상기 복수의 펄스신호를 생성하도록 구성된 것을 특징으로 하는 반도체 회로장치.
  2. 발진호로로부터 발진출력을 카운트함으로써 서로 위상이 다른 복수의 펄스를 펄스폭이 일정한 비율을 유지하도록 생성하는 것을 특징으로 하는 펄스 생성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940010743A 1993-05-19 1994-05-17 반도체 회로장치 KR0169276B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP93-117274 1993-05-19
JP11727493A JP3643385B2 (ja) 1993-05-19 1993-05-19 半導体回路装置

Publications (2)

Publication Number Publication Date
KR940027147A true KR940027147A (ko) 1994-12-10
KR0169276B1 KR0169276B1 (ko) 1999-02-01

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Country Status (3)

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US (1) US5734286A (ko)
JP (1) JP3643385B2 (ko)
KR (1) KR0169276B1 (ko)

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Also Published As

Publication number Publication date
JP3643385B2 (ja) 2005-04-27
KR0169276B1 (ko) 1999-02-01
JPH06335237A (ja) 1994-12-02
US5734286A (en) 1998-03-31

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