KR940010203A - 반도체 장치에서의 콘택 홀 경사면 형성 방법 - Google Patents

반도체 장치에서의 콘택 홀 경사면 형성 방법 Download PDF

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Publication number
KR940010203A
KR940010203A KR1019920019343A KR920019343A KR940010203A KR 940010203 A KR940010203 A KR 940010203A KR 1019920019343 A KR1019920019343 A KR 1019920019343A KR 920019343 A KR920019343 A KR 920019343A KR 940010203 A KR940010203 A KR 940010203A
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KR
South Korea
Prior art keywords
contact hole
inclined surface
semiconductor device
wet etching
bpsg
Prior art date
Application number
KR1019920019343A
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English (en)
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KR960002063B1 (en
Inventor
김재정
이창재
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR92019343A priority Critical patent/KR960002063B1/ko
Publication of KR940010203A publication Critical patent/KR940010203A/ko
Application granted granted Critical
Publication of KR960002063B1 publication Critical patent/KR960002063B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 장치에서의 콘택홀 경사면 형성 방법에 관한 것이다.
콘택홀의 경사면 형성은 금속박막 접착을 견고하게 하기위한 방안으로, 종래에는 이경사면의 형태를 적정하게 제어하는 것이 곤란하였는데, 본 발명에서는 BPSG(4)막은 불순물의 농도에 비례하여 습식식각율이 다르다는 사실에 착안하여, BPSG(4)에 불순물이온을 주입한후 습식식각이 다르다는 사실에 착안하여, PPSG(4)에 불순물이온을 주입한후 습식식각을 행하여 최적의 경사면 형성을 가능하게 하였다.

Description

반도체 장치에서의 콘택 홀 경사면 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 반도체 장치에서의 콘택 홀 경사면 형성 공정도.

Claims (1)

  1. 반도체 기판(1)상에 게이트 영역(2), 콘택 홀이 형성된 산화막(3) 및 BPSG(4)를 형성한후, 상기 BPSG(4)의 표면상에 불순물 이온주입을 행하는 단계와, 상기 BPSG(4) 표면상에 포토레지스트막(5)을 피막후 패턴화하여 기판(1) 표면까지 건식식각하는 단계와, 상기 포토레지스트막(5)을 제거한후, 습식식각하는 단계를 포함한 것을 특징으로 하는 반도체 장치에서의 콘택 홀 경사면 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR92019343A 1992-10-21 1992-10-21 Forming method of contact hole in semiconductor device KR960002063B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92019343A KR960002063B1 (en) 1992-10-21 1992-10-21 Forming method of contact hole in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92019343A KR960002063B1 (en) 1992-10-21 1992-10-21 Forming method of contact hole in semiconductor device

Publications (2)

Publication Number Publication Date
KR940010203A true KR940010203A (ko) 1994-05-24
KR960002063B1 KR960002063B1 (en) 1996-02-10

Family

ID=19341493

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92019343A KR960002063B1 (en) 1992-10-21 1992-10-21 Forming method of contact hole in semiconductor device

Country Status (1)

Country Link
KR (1) KR960002063B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100473157B1 (ko) * 1997-12-31 2005-05-19 주식회사 하이닉스반도체 반도체소자의콘택홀형성방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100473157B1 (ko) * 1997-12-31 2005-05-19 주식회사 하이닉스반도체 반도체소자의콘택홀형성방법

Also Published As

Publication number Publication date
KR960002063B1 (en) 1996-02-10

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