KR940002964A - 범위를 한정시켜 연삭한 변형(deformation)을 가진 반도체 웨이퍼 및 그 제조방법 - Google Patents

범위를 한정시켜 연삭한 변형(deformation)을 가진 반도체 웨이퍼 및 그 제조방법 Download PDF

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KR940002964A
KR940002964A KR1019930008986A KR930008986A KR940002964A KR 940002964 A KR940002964 A KR 940002964A KR 1019930008986 A KR1019930008986 A KR 1019930008986A KR 930008986 A KR930008986 A KR 930008986A KR 940002964 A KR940002964 A KR 940002964A
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semiconductor wafer
wafer
grinding
semiconductor
manufacturing
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KR1019930008986A
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KR970009861B1 (ko
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안톤후버
랑그스토르프 칼-하인즈
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균터시르베, 로버트 뢰머
와커-헤미트로닉 게셀샤프트 휘르 엘렉트로닉-그룬드스토페 엠베하
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B41/00Component parts such as frames, beds, carriages, headstocks
    • B24B41/06Work supports, e.g. adjustable steadies
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/959Mechanical polishing of wafer

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)

Abstract

반도체웨이퍼(Semiconductor wafers)에 있어서, 일측면에 행하여진 필요한 코팅 또는 확산 처리로 응력에 의해 바람직스럽지 아니한 회전대칭변형이 얻어진다.
이와 대비하여 범위를 한정시켜 변형하며 그 변형이 고정에 의해 오프셋(Offset)되는 반도체웨이퍼를 일측면 코팅용으로 사용할 때, 바람직한 평면-평행면을 가진 반도체웨이퍼가 얻어진다.
이 발명은 범위를 한정시켜 연삭한 변형을 가진 이와같은 반도체웨이퍼와 이와같은 반도체 웨이퍼의 제조방법에 관한 것이다.

Description

범위를 한정시켜 연삭한 변형(deformation)을 가진 반도체웨이퍼 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 크리스털로드(crystal rod)를 연삭하며 반도체웨이퍼를 절단하는 단면(end-kace)표면의 단면도,
제2도는 웨이퍼 픽업상에 제1표면-연삭면에 의한 반도체웨이퍼의 고정을 나타낸 단면 표면 설명도,
제3도는 웨이퍼 픽업의 회전축에 대하여 경사되어 있는 연삭공구의 회전축으로 반도체 웨이퍼를 연삭하는 단면표면의 상태도,
제4도는 제2표면에 의해 웨이퍼 픽업상에 반도체웨이퍼를 설정하는 단면표면의 상태도.

Claims (5)

  1. 범위를 한정시켜 연삭한 변형(범위를 한정시켜 연삭한 굽힘 : warp ground in a defined way)을 가진 반도체웨이퍼.
  2. 제1항에 있어서, 그 반도체웨이퍼는 웨이퍼표면의 회전대칭의 만곡(Curvature)과 웨이퍼대향면의 평행구성을 한 결과가 변형됨을 특징으로 하는 위 반도체웨이퍼.
  3. 제2항에 있어서, 그 웨이퍼면의 회전대칭의 만곡(rotaionally Symmetrical curvature)은 볼록형상(convex), 오목형상(concave) 또는 원뿔형상으로 구성함을 특징으로 하는 위 반도체웨이퍼.
  4. 로드형상 반도체결정 단면 (end face)에서 절단시킨 반도체웨이퍼에서 범위를 한정시켜 연삭한 변형(범위를 한정시켜 연삭한 굽힘)을 가진 반도체웨이퍼의 제조방법에 있어서, a) 그 반도체웨이퍼를 웨이퍼픽업상에서 제1면(first Surface)에 의해 고정시켜, 제1연삭공정에서 그 반도체웨이퍼의 대향한 제2면을 연삭시키고 그 연삭 공구와 웨이퍼픽업은 연삭중에 있을 때 회전시키며 그 연삭공구의 회전축은 그 웨이퍼픽업의 회전축에 대하여 하나 또는 둘의 공간방향으로 경사시키고, b) 제2연삭공정에서 웨이퍼픽업의 픽업면과 평행한 반도체웨이퍼의 제1면을 연삭하며 그 반도체웨이퍼의 제2면전체는 연삭중에 있을때 그 웨이퍼픽업에 접선방향으로 접촉시킴을 특징으로 하는 위 반도체웨이퍼의 제조방법.
  5. 제4항에 있어서, 그 반도체웨이퍼는 그 단면에서 표면연삭을 시킨 반도체결정에서 절단시키며, 그 얻어진 반도체웨이퍼의 표면 연삭면은 그 반도체웨이퍼의 제1면인을 특징으로 하는 위 반도체웨이퍼의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930008986A 1992-07-23 1993-05-24 반도체 웨이퍼의 제조방법 KR970009861B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE92-P4224395.5 1992-07-23
DE92-P4224395 1992-07-23
DE4224395A DE4224395A1 (de) 1992-07-23 1992-07-23 Halbleiterscheiben mit definiert geschliffener Verformung und Verfahren zu ihrer Herstellung

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KR940002964A true KR940002964A (ko) 1994-02-19
KR970009861B1 KR970009861B1 (ko) 1997-06-18

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US (1) US5400548A (ko)
EP (1) EP0580162B1 (ko)
JP (1) JP2582030B2 (ko)
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DE (2) DE4224395A1 (ko)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4415132C2 (de) * 1994-04-29 1997-03-20 Siemens Ag Verfahren zur formgebenden Bearbeitung von dünnen Wafern und Solarzellen aus kristallinem Silizium
US5968849A (en) * 1995-06-26 1999-10-19 Motorola, Inc. Method for pre-shaping a semiconductor substrate for polishing and structure
US5821166A (en) * 1996-12-12 1998-10-13 Komatsu Electronic Metals Co., Ltd. Method of manufacturing semiconductor wafers
DE19722679A1 (de) * 1997-05-30 1998-12-03 Wacker Siltronic Halbleitermat Scheibenhalter und Verfahren zur Herstellung einer Halbleiterscheibe
CN1272222A (zh) * 1997-08-21 2000-11-01 Memc电子材料有限公司 处理半导体晶片的方法
DE10009656B4 (de) * 2000-02-24 2005-12-08 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
CN100339969C (zh) * 2000-11-16 2007-09-26 信越半导体株式会社 晶片形状评价法、装置及器件制造法,晶片及晶片挑选法
JP3838341B2 (ja) * 2001-09-14 2006-10-25 信越半導体株式会社 ウェーハの形状評価方法及びウェーハ並びにウェーハの選別方法
DE10147634B4 (de) * 2001-09-27 2004-07-08 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
FR2848336B1 (fr) * 2002-12-09 2005-10-28 Commissariat Energie Atomique Procede de realisation d'une structure contrainte destinee a etre dissociee
DE102005012446B4 (de) * 2005-03-17 2017-11-30 Siltronic Ag Verfahren zur Material abtragenden Bearbeitung einer Halbleiterscheibe
DE102005045337B4 (de) * 2005-09-22 2008-08-21 Siltronic Ag Epitaxierte Siliciumscheibe und Verfahren zur Herstellung von epitaxierten Siliciumscheiben
DE102005045339B4 (de) * 2005-09-22 2009-04-02 Siltronic Ag Epitaxierte Siliciumscheibe und Verfahren zur Herstellung von epitaxierten Siliciumscheiben
DE102005045338B4 (de) * 2005-09-22 2009-04-02 Siltronic Ag Epitaxierte Siliciumscheibe und Verfahren zur Herstellung von epitaxierten Siliciumscheiben
DE102008026784A1 (de) * 2008-06-04 2009-12-10 Siltronic Ag Epitaxierte Siliciumscheibe mit <110>-Kristallorientierung und Verfahren zu ihrer Herstellung
DE102008059044B4 (de) * 2008-11-26 2013-08-22 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe mit einer verspannt-relaxierten Si1-xGex-Schicht
DE102009004557B4 (de) * 2009-01-14 2018-03-08 Siltronic Ag Epitaxierte Siliciumscheibe und Verfahren zur Herstellung von epitaxierten Siliciumscheiben
DE102009010556B4 (de) * 2009-02-25 2013-11-07 Siltronic Ag Verfahren zur Herstellung von epitaxierten Siliciumscheiben
DE102009025242B4 (de) * 2009-06-17 2013-05-23 Siltronic Ag Verfahren zum beidseitigen chemischen Schleifen einer Halbleiterscheibe
DE102009038941B4 (de) 2009-08-26 2013-03-21 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102009048436B4 (de) * 2009-10-07 2012-12-20 Siltronic Ag Verfahren zum Schleifen einer Halbleiterscheibe
DE102009051008B4 (de) * 2009-10-28 2013-05-23 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102010005904B4 (de) * 2010-01-27 2012-11-22 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102010014874A1 (de) 2010-04-14 2011-10-20 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
CN103551957B (zh) * 2013-11-01 2016-04-20 苏州辰轩光电科技有限公司 单面抛光机
JP7035777B2 (ja) * 2017-06-02 2022-03-15 信越化学工業株式会社 半導体用基板およびその製造方法
CN110125730A (zh) * 2018-02-07 2019-08-16 蓝思科技(长沙)有限公司 陶瓷盖板的平面度矫正方法和平面度矫正设备

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8337C (ko) * 1915-11-01
US2699633A (en) * 1949-02-09 1955-01-18 Optron Lab Precision supporting of articles
FR2013944A1 (ko) * 1968-07-30 1970-04-10 Thielenhaus Maschf
CH574612A5 (en) * 1974-10-03 1976-04-15 Celestron Pacific Mfg. of Schmidt correction plate - uses thin glass plate placed over glass matrix block
JPS6193614A (ja) * 1984-10-15 1986-05-12 Nec Corp 半導体単結晶基板
DE3613132A1 (de) * 1986-04-18 1987-10-22 Mueller Georg Nuernberg Verfahren zum zerteilen von harten, nichtmetallischen werkstoffen
DE3771857D1 (de) * 1986-12-08 1991-09-05 Sumitomo Electric Industries Flaechenschleifmaschine.
DE3737540C1 (de) * 1987-11-05 1989-06-22 Mueller Georg Nuernberg Verfahren und Maschine zum Herstellen von Ronden mit zumindest einer planen Oberflaeche
DE3906091A1 (de) * 1989-02-27 1990-08-30 Wacker Chemitronic Verfahren zum zersaegen von stabfoermigen werkstuecken in scheiben mittels innenlochsaege, sowie innenlochsaegen zu seiner durchfuehrung
JPH0355822A (ja) * 1989-07-25 1991-03-11 Shin Etsu Handotai Co Ltd 半導体素子形成用基板の製造方法
JPH0376119A (ja) * 1989-08-17 1991-04-02 Sumitomo Electric Ind Ltd 曲面の研削方法
JP2535645B2 (ja) * 1990-04-20 1996-09-18 富士通株式会社 半導体基板の製造方法

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Publication number Publication date
DE4224395A1 (de) 1994-01-27
EP0580162A1 (de) 1994-01-26
JPH06260459A (ja) 1994-09-16
JP2582030B2 (ja) 1997-02-19
US5400548A (en) 1995-03-28
DE59308969D1 (de) 1998-10-15
EP0580162B1 (de) 1998-09-09
KR970009861B1 (ko) 1997-06-18

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