KR930017125A - 더미 패턴(dymmy pattern)을 갖는 반도체칩 - Google Patents
더미 패턴(dymmy pattern)을 갖는 반도체칩 Download PDFInfo
- Publication number
- KR930017125A KR930017125A KR1019920025554A KR920025554A KR930017125A KR 930017125 A KR930017125 A KR 930017125A KR 1019920025554 A KR1019920025554 A KR 1019920025554A KR 920025554 A KR920025554 A KR 920025554A KR 930017125 A KR930017125 A KR 930017125A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- dummy pattern
- recognition area
- dicing
- dicing line
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract 2
- 229910052782 aluminium Inorganic materials 0.000 claims abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/926—Dummy metallization
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
- Y10T428/31678—Of metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
- Y10T428/31678—Of metal
- Y10T428/31681—Next to polyester, polyamide or polyimide [e.g., alkyd, glue, or nylon, etc.]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Dicing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
알루미늄으로 이루어진 소폭의 더미패턴(6)은 다이싱시에 막의 박리가 인식에리어(2)에까지 이르는 것을 방지하기 위하여 다이싱라인(3)과 반도체 칩(20)의 인식에리어(2)사이에 형성되어 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예에 따른 반도체칩의 일부평면도.
Claims (3)
- 반도체 칩에 있어서, 반도체 디바이스가 형성되어 있는 디바이스 에리어와, 인식마크(1)를 포함하며 다이싱라인(3) 부근에 설정되어 있는 인식에리어(2) 및, 다이싱시에 막의 박리가 인식에리어(2)에까지 이르는 것을 방지하기 위하여 인식에리어(2)및 다이싱라인(3)사이에 형성된 더미패턴(6)을 구비하는 것을 특징으로 하는 더미패턴을 갖는 반도체 칩.
- 제1항에 있어서, 더미패턴(6)은 다이싱라인(3)을 따라 연장하는 소폭의 라인인것을 특징으로 하는 더미패턴을 갖는 반도체 칩.
- 제1항에 있어서, 더미패턴(6)은 알루미늄으로 이루어진 것을 특징으로 하는 더미패턴을 갖는 반도체 칩.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27392 | 1992-01-06 | ||
JP92-000273 | 1992-01-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR930017125A true KR930017125A (ko) | 1993-08-30 |
KR100287919B1 KR100287919B1 (ko) | 2001-05-02 |
Family
ID=11469301
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920025554A KR100287919B1 (ko) | 1992-01-06 | 1992-12-26 | 더미 패턴을 갖는 반도체 칩 |
Country Status (2)
Country | Link |
---|---|
US (1) | US5763057A (ko) |
KR (1) | KR100287919B1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2940432B2 (ja) * | 1995-04-27 | 1999-08-25 | ヤマハ株式会社 | 半導体装置とその製造方法 |
US6172409B1 (en) * | 1997-06-27 | 2001-01-09 | Cypress Semiconductor Corp. | Buffer grated structure for metrology mark and method for making the same |
US6146984A (en) * | 1999-10-08 | 2000-11-14 | Agilent Technologies Inc. | Method and structure for uniform height solder bumps on a semiconductor wafer |
US6194249B1 (en) | 1999-11-01 | 2001-02-27 | Taiwan Semiconductor Manufacturing Company | Method of assembly stress protection |
US9136222B2 (en) | 2012-05-11 | 2015-09-15 | GlobalFoundries, Inc. | Chip identification pattern and method of forming |
US11145689B2 (en) * | 2018-11-29 | 2021-10-12 | Creeled, Inc. | Indicia for light emitting diode chips |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3897627A (en) * | 1974-06-28 | 1975-08-05 | Rca Corp | Method for manufacturing semiconductor devices |
JPS52101967A (en) * | 1976-02-23 | 1977-08-26 | Agency Of Ind Science & Technol | Semiconductor device |
JPS58137228A (ja) * | 1982-02-09 | 1983-08-15 | Toshiba Corp | 半導体装置の製造方法 |
JPS58166741A (ja) * | 1982-03-29 | 1983-10-01 | Fuji Electric Co Ltd | 半導体素子の製造方法 |
JPS63228640A (ja) * | 1987-03-17 | 1988-09-22 | Sharp Corp | 化合物半導体装置 |
US5017512A (en) * | 1989-07-27 | 1991-05-21 | Mitsubishi Denki Kabushiki Kaisha | Wafer having a dicing area having a step region covered with a conductive layer and method of manufacturing the same |
US5206181A (en) * | 1991-06-03 | 1993-04-27 | Motorola, Inc. | Method for manufacturing a semiconductor device with a slotted metal test pad to prevent lift-off during wafer scribing |
US5430325A (en) * | 1992-06-30 | 1995-07-04 | Rohm Co. Ltd. | Semiconductor chip having dummy pattern |
-
1992
- 1992-12-26 KR KR1019920025554A patent/KR100287919B1/ko not_active IP Right Cessation
- 1992-12-29 US US07/997,093 patent/US5763057A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100287919B1 (ko) | 2001-05-02 |
US5763057A (en) | 1998-06-09 |
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