KR930017125A - 더미 패턴(dymmy pattern)을 갖는 반도체칩 - Google Patents

더미 패턴(dymmy pattern)을 갖는 반도체칩 Download PDF

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Publication number
KR930017125A
KR930017125A KR1019920025554A KR920025554A KR930017125A KR 930017125 A KR930017125 A KR 930017125A KR 1019920025554 A KR1019920025554 A KR 1019920025554A KR 920025554 A KR920025554 A KR 920025554A KR 930017125 A KR930017125 A KR 930017125A
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South Korea
Prior art keywords
semiconductor chip
dummy pattern
recognition area
dicing
dicing line
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Application number
KR1019920025554A
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English (en)
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KR100287919B1 (ko
Inventor
히데끼 사와다
히로미 오가다
Original Assignee
사도우 겡 이찌로
로무 가부시기가이샤
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Application filed by 사도우 겡 이찌로, 로무 가부시기가이샤 filed Critical 사도우 겡 이찌로
Publication of KR930017125A publication Critical patent/KR930017125A/ko
Application granted granted Critical
Publication of KR100287919B1 publication Critical patent/KR100287919B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/562Protection against mechanical damage
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/926Dummy metallization
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31678Of metal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31678Of metal
    • Y10T428/31681Next to polyester, polyamide or polyimide [e.g., alkyd, glue, or nylon, etc.]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

알루미늄으로 이루어진 소폭의 더미패턴(6)은 다이싱시에 막의 박리가 인식에리어(2)에까지 이르는 것을 방지하기 위하여 다이싱라인(3)과 반도체 칩(20)의 인식에리어(2)사이에 형성되어 있다.

Description

더미 패턴(dymmy pattern)을 갖는 반도체칩
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예에 따른 반도체칩의 일부평면도.

Claims (3)

  1. 반도체 칩에 있어서, 반도체 디바이스가 형성되어 있는 디바이스 에리어와, 인식마크(1)를 포함하며 다이싱라인(3) 부근에 설정되어 있는 인식에리어(2) 및, 다이싱시에 막의 박리가 인식에리어(2)에까지 이르는 것을 방지하기 위하여 인식에리어(2)및 다이싱라인(3)사이에 형성된 더미패턴(6)을 구비하는 것을 특징으로 하는 더미패턴을 갖는 반도체 칩.
  2. 제1항에 있어서, 더미패턴(6)은 다이싱라인(3)을 따라 연장하는 소폭의 라인인것을 특징으로 하는 더미패턴을 갖는 반도체 칩.
  3. 제1항에 있어서, 더미패턴(6)은 알루미늄으로 이루어진 것을 특징으로 하는 더미패턴을 갖는 반도체 칩.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920025554A 1992-01-06 1992-12-26 더미 패턴을 갖는 반도체 칩 KR100287919B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP27392 1992-01-06
JP92-000273 1992-01-06

Publications (2)

Publication Number Publication Date
KR930017125A true KR930017125A (ko) 1993-08-30
KR100287919B1 KR100287919B1 (ko) 2001-05-02

Family

ID=11469301

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920025554A KR100287919B1 (ko) 1992-01-06 1992-12-26 더미 패턴을 갖는 반도체 칩

Country Status (2)

Country Link
US (1) US5763057A (ko)
KR (1) KR100287919B1 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2940432B2 (ja) * 1995-04-27 1999-08-25 ヤマハ株式会社 半導体装置とその製造方法
US6172409B1 (en) * 1997-06-27 2001-01-09 Cypress Semiconductor Corp. Buffer grated structure for metrology mark and method for making the same
US6146984A (en) * 1999-10-08 2000-11-14 Agilent Technologies Inc. Method and structure for uniform height solder bumps on a semiconductor wafer
US6194249B1 (en) 1999-11-01 2001-02-27 Taiwan Semiconductor Manufacturing Company Method of assembly stress protection
US9136222B2 (en) 2012-05-11 2015-09-15 GlobalFoundries, Inc. Chip identification pattern and method of forming
US11145689B2 (en) * 2018-11-29 2021-10-12 Creeled, Inc. Indicia for light emitting diode chips

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3897627A (en) * 1974-06-28 1975-08-05 Rca Corp Method for manufacturing semiconductor devices
JPS52101967A (en) * 1976-02-23 1977-08-26 Agency Of Ind Science & Technol Semiconductor device
JPS58137228A (ja) * 1982-02-09 1983-08-15 Toshiba Corp 半導体装置の製造方法
JPS58166741A (ja) * 1982-03-29 1983-10-01 Fuji Electric Co Ltd 半導体素子の製造方法
JPS63228640A (ja) * 1987-03-17 1988-09-22 Sharp Corp 化合物半導体装置
US5017512A (en) * 1989-07-27 1991-05-21 Mitsubishi Denki Kabushiki Kaisha Wafer having a dicing area having a step region covered with a conductive layer and method of manufacturing the same
US5206181A (en) * 1991-06-03 1993-04-27 Motorola, Inc. Method for manufacturing a semiconductor device with a slotted metal test pad to prevent lift-off during wafer scribing
US5430325A (en) * 1992-06-30 1995-07-04 Rohm Co. Ltd. Semiconductor chip having dummy pattern

Also Published As

Publication number Publication date
KR100287919B1 (ko) 2001-05-02
US5763057A (en) 1998-06-09

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