KR930008983A - 반도체 웨이퍼의 기계적인 평탄화 작용후 폴리싱 슬러리를 제거하는 방법 - Google Patents

반도체 웨이퍼의 기계적인 평탄화 작용후 폴리싱 슬러리를 제거하는 방법 Download PDF

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Publication number
KR930008983A
KR930008983A KR1019920018877A KR920018877A KR930008983A KR 930008983 A KR930008983 A KR 930008983A KR 1019920018877 A KR1019920018877 A KR 1019920018877A KR 920018877 A KR920018877 A KR 920018877A KR 930008983 A KR930008983 A KR 930008983A
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South Korea
Prior art keywords
polishing
semiconductor wafer
applying
demineralized water
surfactant
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KR1019920018877A
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English (en)
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이. 블랙웰 로버트
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윌리엄 이. 힐러
텍사스 인스트루먼츠 인코포레이티드
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Publication of KR930008983A publication Critical patent/KR930008983A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S134/00—Cleaning and liquid contact with solids
    • Y10S134/902—Semiconductor wafer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

기계적인 평탄화 작용 후에 반도체 웨이퍼 상에 남아 있는 폴리싱 슬러리 입자는 탈염수와 계면활성제의 혼합물이 웨이퍼와 패드에 인가되는 동안에 웨이퍼를 폴리싱 패드로 폴리싱함으로써 반도체 웨이퍼에서 제거된다.

Description

반도체 웨이퍼의 기계적인 평탄화 작용 후 폴리싱 슬러리를 제거하는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명을 사용한 입자의 감소를 도시한 도면,
제2도는 폴리싱 및 클린 단계를 도시한 블럭도,
제3도는 폴리싱 스테이션의 평면도,
제4도는 폴리싱 스테이션의 측면도.

Claims (13)

  1. 반도체 웨이퍼의 기계적인 평탄화 공정 후에 남아 있는 슬러리 폴리싱 입자를 제거하는 방법에 있어서, 계면활성제를 함유하는 탈염수의 린스를 폴리싱 패드에 인가하는 단계 및 반도체 웨이퍼의 평탄화된 표면을 패드 및 탈염수/계면활성제 혼합물로 폴리싱하는 단계를 포함하는 것을 특징으로 하는 방법.
  2. 제1항에 있어서, 탈염수/계면활성제 용액을 분 당100-400ml 속도로 인가하는 단계를 포함하는 것을 특징으로 하는 방법.
  3. 제1항에 있어서, 폴리싱 패드를 플래튼 상에서 회전시키는 단계를 포함하는 것을 특징으로 하는 방법.
  4. 제3항에 있어서, 플래튼이 약 80 rpm으로 회전되는 것을 특징으로 하는 방법.
  5. 제1항에 있어서, 폴리싱 동안에 캐리어 어셈블리를 진동시키는 단계를 포함하는 것을 특징으로 하는 방법.
  6. 제1항에 있어서, 폴리싱 동안에 반도체 웨이퍼에 대해 폴리싱 패드를 약 6 psi의 하향력으로 보유하는 단계를 포함하는 것을 특징으로 하는 방법.
  7. 반도체 웨이퍼의 기계적인 평탄화 공정 후에 남아 있는 슬러리 폴리싱 입자를 제거하는 방법에 있어서, 계면활성제를 함유하는 탈염수의 린스를 폴리싱 패드에 인가하는 단계 및 탈염수/계면활성제 혼합물이 반도체 웨이퍼에 인가될 때 하향력을 폴리싱 패드 상에 인가함으로써 반도체 웨이퍼의 평탄화된 표면을 폴리싱하는 단계를 포함하는 것을 특징으로 하는 방법.
  8. 제7항에 있어서, 탈염수/계면활성제 용액을 분 당100-400ml의 속도로 인가하는 단계를 포함하는 것을 특징으로 하는 방법.
  9. 제7항에 있어서, 캐리어 어셈블리를 회전시키는 단계를 포함하는 것을 특징으로 하는 방법.
  10. 제9항에 있어서, 플래튼이 약 80 rpm으로 회전되는 것을 특징으로 하는 방법.
  11. 제7항에 있어서, 회전 및 폴리싱 동안에 캐리어 어셈블리를 진동시키는 단계를 포함하는 것을 특징으로 하는 방법.
  12. 제7항에 있어서, 폴리싱 동안에 반도체 웨이퍼에 대해 폴리싱 패드를 약 6 psi의 하향력으로 보유하는 단계를 포함하는 것을 특징으로 하는 방법.
  13. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920018877A 1991-10-15 1992-10-14 반도체 웨이퍼의 기계적인 평탄화 작용후 폴리싱 슬러리를 제거하는 방법 KR930008983A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US777,838 1991-10-15
US07/777,838 US5320706A (en) 1991-10-15 1991-10-15 Removing slurry residue from semiconductor wafer planarization

Publications (1)

Publication Number Publication Date
KR930008983A true KR930008983A (ko) 1993-05-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920018877A KR930008983A (ko) 1991-10-15 1992-10-14 반도체 웨이퍼의 기계적인 평탄화 작용후 폴리싱 슬러리를 제거하는 방법

Country Status (5)

Country Link
US (1) US5320706A (ko)
EP (1) EP0537627B1 (ko)
JP (1) JPH05251409A (ko)
KR (1) KR930008983A (ko)
DE (1) DE69219268T2 (ko)

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KR100744101B1 (ko) * 2006-07-27 2007-08-01 두산메카텍 주식회사 웨이퍼 표면연마장비의 플래튼 구동 시스템

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DE69219268D1 (de) 1997-05-28
DE69219268T2 (de) 1997-10-30
EP0537627A2 (en) 1993-04-21
EP0537627B1 (en) 1997-04-23
EP0537627A3 (en) 1993-10-20
US5320706A (en) 1994-06-14
JPH05251409A (ja) 1993-09-28

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