KR930006823A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR930006823A
KR930006823A KR1019920016831A KR920016831A KR930006823A KR 930006823 A KR930006823 A KR 930006823A KR 1019920016831 A KR1019920016831 A KR 1019920016831A KR 920016831 A KR920016831 A KR 920016831A KR 930006823 A KR930006823 A KR 930006823A
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KR
South Korea
Prior art keywords
semiconductor substrate
manufacturing
semiconductor device
deposition process
holder
Prior art date
Application number
KR1019920016831A
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English (en)
Inventor
아르리아너스 마리아 볼터스 로베르루스
Original Assignee
프레데릭 얀 스미트
엔.브이.필립스 글로아이람펜파브리켄
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 프레데릭 얀 스미트, 엔.브이.필립스 글로아이람펜파브리켄 filed Critical 프레데릭 얀 스미트
Publication of KR930006823A publication Critical patent/KR930006823A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/158—Sputtering

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반응 챔버(20)내의 홀더(21)에 배치된 반도체 기판(2)의 표면에 알루미늄을 포함하는 층(3)을 스퍼터 침적 공정으로 침적하는 반도체 장치의 제조방법에 관한 것이다. 상기 침적 공정 동안에 150°K 이하의 온도로 상기 반도체 기판(2)을 냉각시킨다. 양호한 스텝커버리지를 가지는 평탄한 춤을 이러한 방법으로 침적한다.

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 따른 반도체장치의 제조공정중 일단계의 개략 단면도,
제5도는 본 발명에 따른 방법을 달성하기 위한 장치의 개략단면도.

Claims (5)

  1. 스퍼터 침적 공정으로 반응캠버내의 홀더에 위치되어 있는 반도체 기판에 알루미늄을 포함하는 층을 침적하는 반도체 장치의 제조방법에 있어서, 상기 침적 공정동안에 상기 반도체 기판을 150°K 이하의 온도로 냉각하는 것을 특징으로 하는 반도체 장치의 제조방법.
  2. 제1항에 있어서, 상기 반도체 기판이 배치되는 상기 홀더를 150°K 이하의 온도로 냉각하고, 100 내지 2000Pa의 압력을 가지는 가스쿠션을 상기 홀더와 상기 반도체 기판 사이에 유지하는 것으로 상기 반도체 기판을 냉각하는 것을 특징으로 하는 반도체 장치의 제조방법.
  3. 제2항에 있어서, 상기 반도체 기판이 배치되는 홀더를 액체 질소로 냉각하는 것을 특징으로 하는 반도체 장치의 제조방법.
  4. 제1항 내지 제3항중 어느 한 항에 있어서, 상기 스퍼터 침적 공정을 두 단계로 수행하되, 제2단계 동안 내내 상기 반도체 기판을 냉가하지 않는데 반하여 제1단계동안에 상기 반도체 기판을 0℃이상의 온도로 유지하는 것을 특징으로 하는 반도체 장치의 제조방법.
  5. 제4항에 있어서, 상기 스퍼터 침적 공정중 상기 제1단계를 상기 제2단계로 실행하는 전력보다 작은 전력으로 실행하는 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920016831A 1991-09-19 1992-09-16 반도체장치의 제조방법 KR930006823A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP91202415 1991-09-19
EP91202415.5 1991-09-19

Publications (1)

Publication Number Publication Date
KR930006823A true KR930006823A (ko) 1993-04-22

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ID=8207886

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920016831A KR930006823A (ko) 1991-09-19 1992-09-16 반도체장치의 제조방법

Country Status (4)

Country Link
US (1) US5266524A (ko)
EP (1) EP0533254A3 (ko)
JP (1) JPH05211133A (ko)
KR (1) KR930006823A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100407249B1 (ko) * 2000-12-29 2003-11-28 한국조폐공사 위조방지용 자성은선 및 이를 포함하는 제품

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TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
JP3277098B2 (ja) * 1994-07-26 2002-04-22 株式会社東芝 半導体装置の製造方法
US5783282A (en) 1996-10-07 1998-07-21 Micron Technology, Inc. Resputtering to achieve better step coverage of contact holes
US6149778A (en) * 1998-03-12 2000-11-21 Lucent Technologies Inc. Article comprising fluorinated amorphous carbon and method for fabricating article
JP2000068230A (ja) 1998-08-25 2000-03-03 Mitsubishi Electric Corp 半導体装置、その製造装置、および、その製造方法
CA2266502A1 (en) 1999-03-22 2000-09-22 Langen Packaging Inc. Loader
US6720261B1 (en) * 1999-06-02 2004-04-13 Agere Systems Inc. Method and system for eliminating extrusions in semiconductor vias
US6607640B2 (en) * 2000-03-29 2003-08-19 Applied Materials, Inc. Temperature control of a substrate
US9670574B2 (en) 2011-02-16 2017-06-06 Spts Technologies Limited Methods of depositing aluminium layers
GB201102673D0 (en) * 2011-02-16 2011-03-30 Spp Process Technology Systems Uk Ltd Methods of depositing aluminium layers
CN113308676B (zh) * 2021-05-25 2023-02-24 西安微电子技术研究所 一种铝硅铜厚金属薄膜物理气相淀积的腔体处理方法

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US4325776A (en) * 1977-06-20 1982-04-20 Siemens Aktiengesellschaft Method for preparing coarse-crystal or single-crystal metal films
DE3140669A1 (de) * 1981-10-13 1983-04-28 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von halbleitervorrichtungen
JPS6187868A (ja) * 1984-10-05 1986-05-06 Nippon Telegr & Teleph Corp <Ntt> 薄膜形成方法および装置
JPS61208848A (ja) * 1985-03-14 1986-09-17 Toshiba Corp 半導体装置
DE3856483T2 (de) * 1987-03-18 2002-04-18 Kabushiki Kaisha Toshiba, Kawasaki Verfahren zur Herstellung von Dünnschichten
US4911812A (en) * 1987-10-21 1990-03-27 Hitachi, Ltd. Plasma treating method and apparatus therefor
JPH01302726A (ja) * 1988-02-10 1989-12-06 Japan Synthetic Rubber Co Ltd 反応性イオンエッチング装置
JP2512783B2 (ja) * 1988-04-20 1996-07-03 株式会社日立製作所 プラズマエッチング方法及び装置
JPH02219224A (ja) * 1989-02-20 1990-08-31 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP3020521B2 (ja) * 1989-10-16 2000-03-15 株式会社日立製作所 薄膜素子及びその形成方法
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100407249B1 (ko) * 2000-12-29 2003-11-28 한국조폐공사 위조방지용 자성은선 및 이를 포함하는 제품

Also Published As

Publication number Publication date
EP0533254A2 (en) 1993-03-24
US5266524A (en) 1993-11-30
EP0533254A3 (en) 1993-06-23
JPH05211133A (ja) 1993-08-20

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