KR920010761A - 반도체소자실장방법 - Google Patents
반도체소자실장방법 Download PDFInfo
- Publication number
- KR920010761A KR920010761A KR1019910020651A KR910020651A KR920010761A KR 920010761 A KR920010761 A KR 920010761A KR 1019910020651 A KR1019910020651 A KR 1019910020651A KR 910020651 A KR910020651 A KR 910020651A KR 920010761 A KR920010761 A KR 920010761A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- mounting method
- device mounting
- wiring board
- heat dissipation
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 238000000034 method Methods 0.000 title claims description 14
- 230000017525 heat dissipation Effects 0.000 claims 6
- 238000010438 heat treatment Methods 0.000 claims 2
- 239000000463 material Substances 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 238000000465 moulding Methods 0.000 claims 1
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
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- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/80138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8014—Guiding structures outside the body
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8114—Guiding structures outside the body
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01079—Gold [Au]
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- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 반도체소자실장방법에 대한 설명도,
제2도 및 제3도는 본 발명의 제2실시예에 따른 반도체소자실장방법에 대한 설명도로서,
제2도는 반도체소자를 히이트싱크에 접착하는 공정을 도시한 도면이고,
제3도는 반도체소자를 배선기판에 페이스다운본딩하는 공정을 도시한 도면.
Claims (9)
- 각각 범프전극을 가지는 복수의 반도체소자를 준비하는 공정과, 상기 반도체소자의 범프전극을 형성한 표면과 반대쪽의 이면에 방열수단을 접착하는 공정과, 범프전극을 위치맞춤시켜 상기 반도체소자를 배선기판에 밀어붙이는 공정과, 상기 배선기판상에 상기 반도체소자를 가열해서 실장하는 공정으로 구성된 반도체소자실장방법.
- 제1항에 있어서, 상기 방렬수단이 상기 각각의 반도체소장에 대응하는 복수의 히이트싱크를 포함하는 것을 특징으로 하는 반도체소자실장방법.
- 제1항에 있어서, 상기 가열공정후에, 상기 배선기판, 상기 반도체소자 및 상기 방열수단과의 사이에 성형수지를 형성하는 공정을 포함하는 것을 특징으로 하는 반도체소자실장방법.
- 제1항에 있어서, 상기 방열수단이 하나의 히이트싱크를 포함하는 것을 특징으로 하는 반도체소자실장방법.
- 제1항에 있어서, 상기 배선기판의 전극이 볼록형상으로 형성되어 있는 것을 특징으로 하는 반도체소자실장방법.
- 제1항에 있어서, 상기 접착공정전에 상기 방열수단상에 레지스트패턴을 형성하여 상기 반도체소자를 위치맞춤하는 공정을 포함하는 것을 특징으로 하는 반도체소자실장방법.
- 제4항에 있어서, 상기 접착공정전에 상기 히이트싱크의 하부면상에 레지스트패턴을 형성하여 상기 반도체소자를 위치맞춤하는 공정을 포함하는 것을 특징으로 하는 반도체소자실장방법.
- 제1항에 있어서, 상기 배선기판의 전극이 오목형상으로 형성되어 있는 것을 특징으로 하는 반도체소자실장방법.
- 제8항에 있어서, 상기 범프재료보다 융점이 낮은 땜납을 사용하여 상기 반도체소자를 상기 방열수단에 접착하는 것을 특징으로 하는 반도체소자실장방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2312667A JPH04184952A (ja) | 1990-11-20 | 1990-11-20 | 半導体素子実装方法 |
JP2312666A JPH04184951A (ja) | 1990-11-20 | 1990-11-20 | 半導体素子実装方法 |
JP90-312666 | 1990-11-20 | ||
JP2312665A JPH04184950A (ja) | 1990-11-20 | 1990-11-20 | 半導体素子実装方法 |
JP90-312667 | 1990-11-20 | ||
JP90-312665 | 1990-11-20 |
Publications (2)
Publication Number | Publication Date |
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KR920010761A true KR920010761A (ko) | 1992-06-27 |
KR960000696B1 KR960000696B1 (ko) | 1996-01-11 |
Family
ID=27339261
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019910020651A KR960000696B1 (ko) | 1990-11-20 | 1991-11-20 | 반도체소자실장방법 |
Country Status (6)
Country | Link |
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US (2) | US5244142A (ko) |
EP (1) | EP0490125B1 (ko) |
KR (1) | KR960000696B1 (ko) |
AU (1) | AU640537B2 (ko) |
CA (1) | CA2055845A1 (ko) |
DE (1) | DE69117891T2 (ko) |
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JP3007497B2 (ja) * | 1992-11-11 | 2000-02-07 | 三菱電機株式会社 | 半導体集積回路装置、その製造方法、及びその実装方法 |
JP3030201B2 (ja) * | 1994-04-26 | 2000-04-10 | 富士通株式会社 | 半導体装置の製造方法及び半導体装置の製造装置 |
US5471027A (en) * | 1994-07-22 | 1995-11-28 | International Business Machines Corporation | Method for forming chip carrier with a single protective encapsulant |
US5874780A (en) | 1995-07-27 | 1999-02-23 | Nec Corporation | Method of mounting a semiconductor device to a substrate and a mounted structure |
JP3201957B2 (ja) * | 1996-06-27 | 2001-08-27 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 金属バンプ、金属バンプの製造方法、接続構造体 |
JP2845847B2 (ja) * | 1996-11-12 | 1999-01-13 | 九州日本電気株式会社 | 半導体集積回路 |
US6389688B1 (en) | 1997-06-18 | 2002-05-21 | Micro Robotics Systems, Inc. | Method and apparatus for chip placement |
KR100246366B1 (ko) * | 1997-12-04 | 2000-03-15 | 김영환 | 에리어 어레이형 반도체 패키지 및 그 제조방법 |
US5956235A (en) * | 1998-02-12 | 1999-09-21 | International Business Machines Corporation | Method and apparatus for flexibly connecting electronic devices |
US6313999B1 (en) * | 1999-06-10 | 2001-11-06 | Agere Systems Optoelectronics Guardian Corp. | Self alignment device for ball grid array devices |
US6399896B1 (en) | 2000-03-15 | 2002-06-04 | International Business Machines Corporation | Circuit package having low modulus, conformal mounting pads |
JP3631445B2 (ja) * | 2001-06-06 | 2005-03-23 | 東芝三菱電機産業システム株式会社 | 平型半導体スタック装置 |
JP2003188507A (ja) * | 2001-12-18 | 2003-07-04 | Mitsubishi Electric Corp | 半導体集積回路およびこれを実装するためのプリント配線板 |
US6732908B2 (en) * | 2002-01-18 | 2004-05-11 | International Business Machines Corporation | High density raised stud microjoining system and methods of fabricating the same |
US7468886B2 (en) * | 2007-03-05 | 2008-12-23 | International Business Machines Corporation | Method and structure to improve thermal dissipation from semiconductor devices |
US8381965B2 (en) | 2010-07-22 | 2013-02-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Thermal compress bonding |
US8104666B1 (en) | 2010-09-01 | 2012-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Thermal compressive bonding with separate die-attach and reflow processes |
US8177862B2 (en) | 2010-10-08 | 2012-05-15 | Taiwan Semiconductor Manufacturing Co., Ltd | Thermal compressive bond head |
US10032699B1 (en) * | 2014-04-28 | 2018-07-24 | Amkor Technology, Inc. | Flip chip self-alignment features for substrate and leadframe applications |
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Publication number | Priority date | Publication date | Assignee | Title |
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US4292647A (en) * | 1979-04-06 | 1981-09-29 | Amdahl Corporation | Semiconductor package and electronic array having improved heat dissipation |
US4620215A (en) * | 1982-04-16 | 1986-10-28 | Amdahl Corporation | Integrated circuit packaging systems with double surface heat dissipation |
JPS5965458A (ja) * | 1982-10-05 | 1984-04-13 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US4612601A (en) * | 1983-11-30 | 1986-09-16 | Nec Corporation | Heat dissipative integrated circuit chip package |
JPS60126853A (ja) * | 1983-12-14 | 1985-07-06 | Hitachi Ltd | 半導体デバイス冷却装置 |
JPS60137041A (ja) * | 1983-12-26 | 1985-07-20 | Matsushita Electronics Corp | 樹脂封止形半導体装置 |
US4604644A (en) * | 1985-01-28 | 1986-08-05 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making |
GB8522429D0 (en) * | 1985-09-10 | 1985-10-16 | Plessey Co Plc | Alignment for hybrid device |
JPS62136865A (ja) * | 1985-12-11 | 1987-06-19 | Hitachi Ltd | モジユ−ル実装構造 |
US4964458A (en) * | 1986-04-30 | 1990-10-23 | International Business Machines Corporation | Flexible finned heat exchanger |
JPS6376279A (ja) * | 1986-09-19 | 1988-04-06 | 株式会社日立製作所 | コネクタ及びそれを用いた半導体素子実装構造 |
JPH0770650B2 (ja) * | 1986-10-20 | 1995-07-31 | 富士通株式会社 | 半導体装置の冷却方法 |
JPS63252432A (ja) * | 1987-04-09 | 1988-10-19 | Sumitomo Electric Ind Ltd | 半導体装置の製造方法 |
US4831724A (en) * | 1987-08-04 | 1989-05-23 | Western Digital Corporation | Apparatus and method for aligning surface mountable electronic components on printed circuit board pads |
JPH01232734A (ja) * | 1988-03-14 | 1989-09-18 | Fujitsu Ltd | 表面実装部品及びその実装方法 |
DE68925922T2 (de) * | 1988-05-30 | 1996-09-05 | Canon Kk | Elektrischer Schaltungsapparat |
US4939570A (en) * | 1988-07-25 | 1990-07-03 | International Business Machines, Corp. | High power, pluggable tape automated bonding package |
US5005638A (en) * | 1988-10-31 | 1991-04-09 | International Business Machines Corporation | Thermal conduction module with barrel shaped piston for improved heat transfer |
US5001548A (en) * | 1989-03-13 | 1991-03-19 | Coriolis Corporation | Multi-chip module cooling |
US4967950A (en) * | 1989-10-31 | 1990-11-06 | International Business Machines Corporation | Soldering method |
US5121190A (en) * | 1990-03-14 | 1992-06-09 | International Business Machines Corp. | Solder interconnection structure on organic substrates |
US5203075A (en) * | 1991-08-12 | 1993-04-20 | Inernational Business Machines | Method of bonding flexible circuit to cicuitized substrate to provide electrical connection therebetween using different solders |
-
1991
- 1991-11-18 EP EP91119669A patent/EP0490125B1/en not_active Expired - Lifetime
- 1991-11-18 DE DE69117891T patent/DE69117891T2/de not_active Expired - Fee Related
- 1991-11-19 AU AU87998/91A patent/AU640537B2/en not_active Ceased
- 1991-11-19 CA CA002055845A patent/CA2055845A1/en not_active Abandoned
- 1991-11-19 US US07/794,869 patent/US5244142A/en not_active Expired - Fee Related
- 1991-11-20 KR KR1019910020651A patent/KR960000696B1/ko not_active IP Right Cessation
-
1993
- 1993-02-02 US US08/012,369 patent/US5348214A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
AU640537B2 (en) | 1993-08-26 |
DE69117891T2 (de) | 1996-07-25 |
DE69117891D1 (de) | 1996-04-18 |
EP0490125B1 (en) | 1996-03-13 |
AU8799891A (en) | 1992-05-21 |
US5244142A (en) | 1993-09-14 |
EP0490125A1 (en) | 1992-06-17 |
CA2055845A1 (en) | 1992-05-21 |
US5348214A (en) | 1994-09-20 |
KR960000696B1 (ko) | 1996-01-11 |
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