KR910020858A - 수지봉지형(封止型) 반도체장치 및 그 제조방법 - Google Patents

수지봉지형(封止型) 반도체장치 및 그 제조방법 Download PDF

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Publication number
KR910020858A
KR910020858A KR1019910004310A KR910004310A KR910020858A KR 910020858 A KR910020858 A KR 910020858A KR 1019910004310 A KR1019910004310 A KR 1019910004310A KR 910004310 A KR910004310 A KR 910004310A KR 910020858 A KR910020858 A KR 910020858A
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KR
South Korea
Prior art keywords
resin
semiconductor element
electrode
lead frame
manufacturing
Prior art date
Application number
KR1019910004310A
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English (en)
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KR940007948B1 (ko
Inventor
이찌로 모리류
Original Assignee
시기 모리야
미쓰비시뎅끼가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 시기 모리야, 미쓰비시뎅끼가부시끼가이샤 filed Critical 시기 모리야
Publication of KR910020858A publication Critical patent/KR910020858A/ko
Application granted granted Critical
Publication of KR940007948B1 publication Critical patent/KR940007948B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

내용 없음

Description

수지봉지형(封止型) 반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한실시예에 의한 수지봉지형(樹脂封止型)반도체 장치를 표시하는 사시도.

Claims (2)

  1. 반도체 소자와, 이 반도체 소자를 얹어놓는 다이패드를 포함하는 리드플레임과, 상기 반도체 소자의 전극상에 복수개 설치된 외부전극과, 이 외부전극이 상부에 돌출하도록 상기 반도체소자, 리드플레임 및 외부전극을 봉지하는 봉지수지와를 구비한 것을 특징으로 하는 수지봉지형 반도체장치.
  2. 반도체 소자의 전극상에 코팅수지를 시행하고, 이 반도체 소자를 리드플레임의 다이패드에 얹어놓고, 상기 코팅수지의 표면에 접촉하는 금형을 사용하여 상기 반도체 소자 및 리드 플레임을 봉지수지로 봉지하고, 수지봉지한 반도 체소자 전극상의 코팅수지를 용제로 제거하여 전극상의 봉지수지에 구멍을 형성하고, 계속해서, 이 구멍내에 금속을 매설하는 것에 의하여 외부전극을 형성하는 것을 특징으로 하는 수지봉지형 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910004310A 1990-05-30 1991-03-19 수지봉지형(封止型) 반도체장치 및 그 제조방법 KR940007948B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2138278A JP2809478B2 (ja) 1990-05-30 1990-05-30 樹脂封止型半導体装置の製造方法
JP2-138278 1990-05-30

Publications (2)

Publication Number Publication Date
KR910020858A true KR910020858A (ko) 1991-12-20
KR940007948B1 KR940007948B1 (ko) 1994-08-29

Family

ID=15218179

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910004310A KR940007948B1 (ko) 1990-05-30 1991-03-19 수지봉지형(封止型) 반도체장치 및 그 제조방법

Country Status (2)

Country Link
JP (1) JP2809478B2 (ko)
KR (1) KR940007948B1 (ko)

Also Published As

Publication number Publication date
KR940007948B1 (ko) 1994-08-29
JPH0433358A (ja) 1992-02-04
JP2809478B2 (ja) 1998-10-08

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