KR910007153A - 메사형으로 이루어진 반도체 보디의 제조방법 - Google Patents

메사형으로 이루어진 반도체 보디의 제조방법 Download PDF

Info

Publication number
KR910007153A
KR910007153A KR1019900014599A KR900014599A KR910007153A KR 910007153 A KR910007153 A KR 910007153A KR 1019900014599 A KR1019900014599 A KR 1019900014599A KR 900014599 A KR900014599 A KR 900014599A KR 910007153 A KR910007153 A KR 910007153A
Authority
KR
South Korea
Prior art keywords
semiconductor
semiconductor layer
layer
etched
manufacturing
Prior art date
Application number
KR1019900014599A
Other languages
English (en)
Other versions
KR0174537B1 (ko
Inventor
요르다누스 마리아 빈스마 요한네스
파우루스 티예부르그 루돌프
Original Assignee
프레데릭 얀 스미트
엔. 브이. 필립스 글로아이람펜파브리켄
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 프레데릭 얀 스미트, 엔. 브이. 필립스 글로아이람펜파브리켄 filed Critical 프레데릭 얀 스미트
Publication of KR910007153A publication Critical patent/KR910007153A/ko
Application granted granted Critical
Publication of KR0174537B1 publication Critical patent/KR0174537B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/131—Integrated optical circuits characterised by the manufacturing method by using epitaxial growth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02392—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02461—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063—Electrolytic etching
    • H01L21/30635—Electrolytic etching of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227—Buried mesa structure ; Striped active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/3434—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer comprising at least both As and P as V-compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2054—Methods of obtaining the confinement
    • H01S5/2081—Methods of obtaining the confinement using special etching techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227—Buried mesa structure ; Striped active layer
    • H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/3235—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers
    • H01S5/32391—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers based on In(Ga)(As)P
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34306—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000nm, e.g. InP based 1300 and 1500nm lasers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Electromagnetism (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biophysics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Geometry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Weting (AREA)
  • Semiconductor Lasers (AREA)

Abstract

내용 없음

Description

메사형으로 이루어진 반도체 보디의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 4 도는 연속 제조 단계시 방사선 유도의 단면에 대한 방사선 유도를 제조하기 위한 본 발명에 따른 방법의 제1실시예도.

Claims (16)

  1. 반도체 기판상에 반도체층 구조가 제공되어 있는데, 상기 구조는 제 1 반도체 재질로 이루어진 최소 제 1 반도체층 및, 상기 제 1 반도체층상에 제공되어, 제 1 반도체 재질로 다른 제 2 반도체 재질로 이루어진 제 2 반도체층을 포함하여 이루어지는 동시에, 제 1 반도체층사의 두께는 제 2 반도체층의 두께에 비해 비교적 작게 선택되며, 그 후 최소 제 1 및 제 2 반도체층으로 이루어진 메사형은 반도체층 구조에서 에칭 및 마스크에 의해서 형성되며, 화학적 습식 부식제는 제 2 반도체층을 제거하기 위하여 사용되는 반도체 보디를 제조하는 방법에 있어서, 제 2 반도체층을 제거할 때, 선택적이며 우선적인 부식제가 사용되며, 마스크에 대해서 거의 언더 에칭이 발생하지 않으며, 제 1 반도체층이 제거되기전, 상기 층의 반도체 재질 및 제 2 반도체층 부분의 재질은 거의 비선택 양극 산화물에 의해 반도체 산화물로 변환되며, 그 후 반도체 산화물에 대해서 비선택적 그리고 반도체 재질에 대해서 선택적인 부식제에 의해서 반도체 산화물이 제거되는 것을 특징으로하는 반도체 보디의 제조방법.
  2. 제 1 항에 있어서, 제 1 및 제 2 반도체 재질은 제1 반도체 재질의 대역갭이 제 2 반도체 재질의 대역갭보다 작도록 선택되며, 제1반도체층이 제동되기전, 제2번도체 재질의 제3반도체층이 제공되며, 메사형은 최소 제3반도체층에서 형성되며, 제 1 반도체층이 에칭된 후, 제 3 반도체층은 선택적이며 우선적인 부식제에 의해서 에칭되는 것을 특징으로하는 반도체 보디의 제조방법.
  3. 제 1 항 또는 제 2 항에 있어서, 메사형은 스트립 형태이며, 세로 방향과 같이(110) 결정 방위가 선택되며, 메사형은 반도체층 구조와 거의 직각으로 측면벽에 제공되는 것을 특징으로하는 반도체 보디의 제조방법.
  4. 선행하는 어느 한 항에 있어서, 반도체 기판으로서 인듐 인화물, 제 1 반도체 재질로서 인듐 갈륨 비소 또는 인듐 갈륨 비소 인화물, 그리고 제 2 반도체 재질로서 인듐 인화물이 선택되는 것을 특징으로하는 반도체 보디의 제조방법.
  5. 선행하는 어느 한 항에 있어서, 마스크는 제 2 반도체층상에 제공된 층에서 형성되며, 또 다른 마스크에 의해서 국부적으로 에칭 제거되는 것을 특징으로 하는 반도체 보디의 제조방법.
  6. 제 5 항에 있어서, 층은 실리콘 질화물로 이루어지며, 플라즈마 CVD에 의해 도포되는 것을 특징으로하는 반도체 보디의 제조방법.
  7. 제 5 항에 있어서, 층으로서 제 1 반도체 재질의 제 4반도체층이 제공되며, 제 4 반도체층상에 또다른 층이 제공되며, 또다른 마스크는 제 4 반도체층이 또다른 마스크에 대해서 언더 에칭으로 에칭된 후, 사진 식각법 및 에칭에 의해서 형성되며, 마스크는 또다른 마스크가 마스크 외로 돌출하는 형태로 제 4 반도체층에 형성되는 것을 특징으로 하는 반도체 보디의 제조방법.
  8. 제 7 항에 있어서, 제 4 반도체층은 제 2 반도체층의 반도체 재질에 대해서 선택적으로 이층을 에칭하는 부식재에 의하여 에칭되는 것을 특징으로 하는 반도체 보디의 제조방법.
  9. 선행하는 어느 한 항에 있어서, 메사형 곁에 하나 이상의 반도체층은 유기 금속 기상 에피택셜 성장에 의하여 제공되는 것을 특징으로 하는 반도체 보디의 제조방법.
  10. 제 7 항, 제 8 항 또는 제 9 항에 있어서, 제 1 전도성 형태는 반도체 기판 및 제 3 반도체층에 대해서 선택되며, 반도체층에 대해서 선택되며, 제 2 전도성 형태는 제 2 및 제 4 반도체층에 대해서 선택되며, 제 1 반도체층은 의도적으로 도우핑도지 않으며, 메사형을 형성한 후 반절연 반도체층의 형태로 전류 차단층 구조 또는 차단 pn 접합을 형성하는 최소 두개의 반도체층이 메사형 곁에 제공되며, 반도체 보디의 하위면과 제 4 반도체층의 상위면은 접촉되며, 반도체 보디는 메사형과 직각 방향으로 균열되며, 메사형을 한정하는 미러 표면은 전기 접속으로의 순방향 레이져 작용내에서 메사형에 위치하며 활성 방사선 방출 영역으로 작용하는 공간 공동을 형성하는 일부분의 반도체층이 얻어지도록 형성되는 것을 특징으로 하는 반도체 보디의 제조방법.
  11. 선행하는 어느 한 항에 있어서, 제 1 반도체층의 두께는 0.2㎛와 같거나 그 이하로 선택되는 것을 특징으로 하는 반도체 보디의 제조방법.
  12. 선행하는 어느한 항에 있어서, 제 1 반도체층은 얇은 반도체층의 기단에 의해 형성된 다층 양자 우물층 구조층중에 하나이며, 각 층은 양자 우물을 형성하는 반도체층보다 큰 대역갭을 가지는 반도체 재질을 포함하는 반도체층에 의해서 에워싸여진 양자 우물을 형성하는 것을 특징으로 하는 반도체 보디의 제조방법.
  13. 선행하는 어느 한 항에 있어서, 양극 산화물 및 반도체 산화물의 에칭은 구연산 3%용액으로 동시에 완성되며, 그 PH는 어텔렌 글리콜의 2부분으로 묽게된 인산에 의하여 약 1로 되는 것을 특징으로 하는 반도체 보디의 제조방법.
  14. 선행하는 어느 한 항에 있어서, 양극 산화물은 구연산의 3%용액으로 완성되며, 그 PH는 에틸렌 글리콜의 2부분으로 묽게된 암모니아에 의해서 약 6으로 되는 것을 특징으로 하는 반도체 보디의 제조방법.
  15. 제 14 항에 있어서, 형성된 반도체 산화물은 인산의 1.5몰 용액으로 에칭되는 것을 특징으로 하는 반도체 보디의 제조방법.
  16. 제 4 항에 있어서, 인듐 산화물은 1:4의 비율로 염산과 인산을 함유하는 부식제에 의하여 에칭되며, 제 4 반도체층의 인듐 갈륨 비소 인화물은 1:1:9의 비율로 설폰산, 과산화수소 및 물을 함유하는 부식제에 의하여 에칭되는 것을 특징으로 하는 반도체 보디의 제조방법.
    ※ 참고사항 : 최초 출원 내용에 의하여 공개하는 것임.
KR1019900014599A 1989-09-14 1990-09-11 메사로 이루어진 반도체 보디의 제조방법 KR0174537B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8902292A NL8902292A (nl) 1989-09-14 1989-09-14 Werkwijze voor het vervaardigen van een een mesa bevattende halfgeleiderinrichting.
NL8902292 1989-09-14

Publications (2)

Publication Number Publication Date
KR910007153A true KR910007153A (ko) 1991-04-30
KR0174537B1 KR0174537B1 (ko) 1999-02-01

Family

ID=19855304

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014599A KR0174537B1 (ko) 1989-09-14 1990-09-11 메사로 이루어진 반도체 보디의 제조방법

Country Status (6)

Country Link
US (1) US5266518A (ko)
EP (1) EP0418953B1 (ko)
JP (1) JP2958084B2 (ko)
KR (1) KR0174537B1 (ko)
DE (1) DE69017332T2 (ko)
NL (1) NL8902292A (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9413137B2 (en) 2013-03-15 2016-08-09 Nlight, Inc. Pulsed line beam device processing systems using laser diodes
US10466494B2 (en) 2015-12-18 2019-11-05 Nlight, Inc. Reverse interleaving for laser line generators

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04373190A (ja) * 1991-06-24 1992-12-25 Matsushita Electric Ind Co Ltd 歪量子井戸半導体レーザおよびその製造方法
JPH0677205A (ja) * 1992-08-26 1994-03-18 Matsushita Electric Ind Co Ltd 化合物半導体の微細構造形成方法
KR0146714B1 (ko) * 1994-08-08 1998-11-02 양승택 평면 매립형 레이저 다이오드의 제조방법
JP3374878B2 (ja) * 1994-09-02 2003-02-10 三菱電機株式会社 半導体エッチング方法
EP0808522B1 (en) * 1995-11-08 2000-02-16 Uniphase Opto Holdings, Inc. Semiconductor diode laser, in particular a laser amplifier, and method of manufacturing this laser
US5834379A (en) * 1996-07-16 1998-11-10 Cornell Research Foundation, Inc. Process for synthesis of cubic GaN on GaAs using NH3 in an RF plasma process
JP2001111160A (ja) * 1999-04-19 2001-04-20 Canon Inc 半導体素子の製造方法及び半導体素子、リング共振器型半導体レーザ、ジャイロ
JP2003519438A (ja) 1999-04-27 2003-06-17 シュラムバーガー ホールディングス リミテッド 放射源
US6228673B1 (en) * 1999-05-13 2001-05-08 Hughes Electronics Corporation Method of fabricating a surface coupled InGaAs photodetector
JP2005234241A (ja) * 2004-02-19 2005-09-02 Sharp Corp 液晶表示装置
US7518196B2 (en) 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7547637B2 (en) 2005-06-21 2009-06-16 Intel Corporation Methods for patterning a semiconductor film
US9263611B2 (en) * 2011-11-17 2016-02-16 Solar Junction Corporation Method for etching multi-layer epitaxial material
US9142615B2 (en) 2012-10-10 2015-09-22 Solar Junction Corporation Methods and apparatus for identifying and reducing semiconductor failures
DE102016013749A1 (de) * 2016-11-18 2018-05-24 Azur Space Solar Power Gmbh Stapelförmige Halbleiterstruktur

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4190813A (en) * 1977-12-28 1980-02-26 Bell Telephone Laboratories, Incorporated Strip buried heterostructure laser
EP0042484A3 (en) * 1980-06-25 1982-07-14 Northern Telecom Limited High radiance led's
US4460910A (en) * 1981-11-23 1984-07-17 International Business Machines Corporation Heterojunction semiconductor
US4417385A (en) * 1982-08-09 1983-11-29 General Electric Company Processes for manufacturing insulated-gate semiconductor devices with integral shorts
JPS61147571A (ja) * 1984-12-21 1986-07-05 Toshiba Corp ヘテロ接合バイポ−ラトランジスタの製造方法
DE3751243T2 (de) * 1986-02-18 1995-08-31 Toshiba Kawasaki Kk Opto-elektronisches Bauelement und Verfahren zu seiner Herstellung.
US4792958A (en) * 1986-02-28 1988-12-20 Kabushiki Kaisha Toshiba Semiconductor laser with mesa stripe waveguide structure
JPS6338277A (ja) * 1986-08-01 1988-02-18 Fujitsu Ltd 半導体装置の製造方法
GB8622767D0 (en) * 1986-09-22 1986-10-29 British Telecomm Semiconductor structures

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9413137B2 (en) 2013-03-15 2016-08-09 Nlight, Inc. Pulsed line beam device processing systems using laser diodes
US10466494B2 (en) 2015-12-18 2019-11-05 Nlight, Inc. Reverse interleaving for laser line generators

Also Published As

Publication number Publication date
EP0418953A1 (en) 1991-03-27
US5266518A (en) 1993-11-30
DE69017332T2 (de) 1995-09-14
JP2958084B2 (ja) 1999-10-06
KR0174537B1 (ko) 1999-02-01
NL8902292A (nl) 1991-04-02
EP0418953B1 (en) 1995-03-01
JPH03106026A (ja) 1991-05-02
DE69017332D1 (de) 1995-04-06

Similar Documents

Publication Publication Date Title
KR910007153A (ko) 메사형으로 이루어진 반도체 보디의 제조방법
US7329569B2 (en) Methods of forming semiconductor devices including mesa structures and multiple passivation layers
EP0450255B1 (en) Process for forming the ridge structure of a self-aligned semiconductor laser
CN101276994B (zh) 半导体光元件的制造方法
US6090300A (en) Ion-implantation assisted wet chemical etching of III-V nitrides and alloys
JP2005505133A (ja) 窒化物−化合物半導体をベースとする半導体デバイスの製造方法
JPH07111361A (ja) 埋込型半導体レーザ素子及びその製造方法
KR100283958B1 (ko) 레이저 다이오드 제작 방법
KR980006665A (ko) 광 소자의 제조방법
EP0786147A2 (en) Ridge-shaped laser in a channel
JPS6057990A (ja) 半導体レ−ザ
JPS62165384A (ja) 半導体発光装置の製造方法
KR970004190A (ko) 반도체 레이저 다이오드의 제조방법
JPS6052080A (ja) 自己整合型多層レーザ構造体の製造方法
KR940020628A (ko) 반도체 레이저 다이오드 제조방법
KR930015231A (ko) 반도체 레이저 다이오드의 제조방법
KR910019296A (ko) 매립형 이종구조 반도체 레이저 제조방법
KR950010242A (ko) 반도체 레이저 소자 및 그의 제조 방법
KR960027107A (ko) 레이저 다이오드 제조방법
JPH07111360A (ja) 埋込型半導体レーザ素子及びその製造方法
KR950012787A (ko) 반도체 레이저 소자 및 그 제조방법
KR930022647A (ko) 레이저다이오드의 제조방법
JPS61101088A (ja) 半導体レ−ザの製造方法
KR950012873A (ko) 반도체 레이저 다이오드 및 그의 제조 방법
JPS59222936A (ja) 化合物半導体装置の製造方法

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee