KR890011511A - 지지부상에 전자부품 및 그 컨택(Contact)을 고정시키는 방법 - Google Patents

지지부상에 전자부품 및 그 컨택(Contact)을 고정시키는 방법 Download PDF

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Publication number
KR890011511A
KR890011511A KR1019880017186A KR880017186A KR890011511A KR 890011511 A KR890011511 A KR 890011511A KR 1019880017186 A KR1019880017186 A KR 1019880017186A KR 880017186 A KR880017186 A KR 880017186A KR 890011511 A KR890011511 A KR 890011511A
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KR
South Korea
Prior art keywords
support
electrical contact
electronic component
thin film
positioning
Prior art date
Application number
KR1019880017186A
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English (en)
Inventor
글로똥 쟝-삐에르
Original Assignee
뿔 발로
에스 지 에스-톰슨 마이크로일렉트로닉스소시에떼아노님
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 뿔 발로, 에스 지 에스-톰슨 마이크로일렉트로닉스소시에떼아노님 filed Critical 뿔 발로
Publication of KR890011511A publication Critical patent/KR890011511A/ko

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

내용 없음

Description

지지부상에 전자부품 및 그 컨택(Contact)을 고정시키는 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 2도는 외부 전기적 컨택이 본 발명에 따라 전기적으로 연결되기 전에 지지부상의 전자부품을 나타내는 사시도.
제 3도는 본 발명의 방법에 따라 사용될 수 있는 컨택의 지지부의 또다른 배열을 나타내는 사시도이다.

Claims (6)

  1. 전자 부품을 하우징 하기 위한 캐비티로 구성되어 있는 지지 부상에 전자부품 및 그 컨택을 고정시키는 방법에 있어서, 상기 방법은 부품의 출력단자가 캐비티의 오프닝을 통하여 들어나도록 캐비티내에 전자 부품의 위치를 정하는 단계, 전자 부품의 출력단자의 모양에 적당한 패턴에 따라 지지용 박막상에 전기적 컨택의 위치를 정하는 단계, 지지용 박막에 의해 지지부상에 전기적 컨택의 위치를 정하는 단계, 및 전자부품의 출력단자에 상기 전기적 컨택의 전기적 연결을 동시에 하는 단계로 구성되어 있는 것을 특징으로 하는 지지부상에 전자부품 및 그 컨택을 고정시키는 방법.
  2. 제 1항에 있어서, 전기적 컨택이 지지용 박막의 한 표면상에 놓여서, 상기지지부상에 위치하도록 하는 작업을 하는 동안 지지용 박막으로 부터 분리되어 지지부에 본딩하는 것을 특징으로 하는 방법.
  3. 제 1항에 있어서, 지지부상에 위치를 정하는 작업을 하는 동안에, 전기적 컨택이 상기 지지용 박막상의 위치에 남아 있도록 지지용 박막의 한표면에 배열되어 있는 것을 특징으로 하는 방법.
  4. 제 1항에 있어서, 지지용 박막에 의해 지지부상에 전기적 컨택의 위치를 정하는단계 및 전자부품의 출력단자에 상기 전기적 컨택의 전기적 연결을 동시에 하는 단계는 테이프 자동 본딩 공정에 의해 완성되는 것을 특징으로 하는 방법.
  5. 제 1항에 있어서, 지지용 박막에 의해 지지부상에 전기적 컨택의 위치를 정하는 작업은 지지부에 지지용 박막을 본딩함으로써 완성되는 것을 특징으로 하는방법.
  6. 제 1항에 있어서, 전자부품의 출력단자에 상기 전기적 컨택의 전기적 연결을동시에 하는 작업은 테이프 자동 본딩공정에 의해 완성되는 것을 특징으로 하는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880017186A 1987-12-22 1988-12-20 지지부상에 전자부품 및 그 컨택(Contact)을 고정시키는 방법 KR890011511A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8717900 1987-12-22
FR8717900A FR2625067A1 (fr) 1987-12-22 1987-12-22 Procede pour fixer sur un support un composant electronique et ses contacts

Publications (1)

Publication Number Publication Date
KR890011511A true KR890011511A (ko) 1989-08-14

Family

ID=9358142

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880017186A KR890011511A (ko) 1987-12-22 1988-12-20 지지부상에 전자부품 및 그 컨택(Contact)을 고정시키는 방법

Country Status (6)

Country Link
US (1) US4941257A (ko)
EP (1) EP0323295B1 (ko)
JP (1) JP2931864B2 (ko)
KR (1) KR890011511A (ko)
DE (1) DE3877550T2 (ko)
FR (1) FR2625067A1 (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1002529A6 (nl) * 1988-09-27 1991-03-12 Bell Telephone Mfg Methode om een elektronische component te monteren en geheugen kaart waarin deze wordt toegepast.
USRE35578E (en) * 1988-12-12 1997-08-12 Sgs-Thomson Microelectronics, Inc. Method to install an electronic component and its electrical connections on a support, and product obtained thereby
FR2664721B1 (fr) * 1990-07-10 1992-09-25 Gemplus Card Int Carte a puce renforcee.
US5581445A (en) * 1994-02-14 1996-12-03 Us3, Inc. Plastic integrated circuit card with reinforcement structure for protecting integrated circuit module
FR2724477B1 (fr) * 1994-09-13 1997-01-10 Gemplus Card Int Procede de fabrication de cartes sans contact
DE19632113C1 (de) 1996-08-08 1998-02-19 Siemens Ag Chipkarte, Verfahren zur Herstellung einer Chipkarte und Halbleiterchip zur Verwendung in einer Chipkarte
DE19708617C2 (de) 1997-03-03 1999-02-04 Siemens Ag Chipkartenmodul und Verfahren zu seiner Herstellung sowie diesen umfassende Chipkarte
US20080196827A1 (en) * 2005-07-04 2008-08-21 Griffith University Fabrication of Electronic Components In Plastic
KR100651563B1 (ko) * 2005-07-07 2006-11-29 삼성전기주식회사 전자부품이 내장된 배선기판의 제조방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1483570A (ko) * 1965-06-23 1967-09-06
US3387365A (en) * 1965-09-28 1968-06-11 John P. Stelmak Method of making electrical connections to a miniature electronic component
US3614832A (en) * 1966-03-09 1971-10-26 Ibm Decal connectors and methods of forming decal connections to solid state devices
US3838984A (en) * 1973-04-16 1974-10-01 Sperry Rand Corp Flexible carrier and interconnect for uncased ic chips
US3859723A (en) * 1973-11-05 1975-01-14 Microsystems Int Ltd Bonding method for multiple chip arrays
US3998377A (en) * 1974-12-09 1976-12-21 Teletype Corporation Method of and apparatus for bonding workpieces
FR2470414A1 (fr) * 1979-11-27 1981-05-29 Flonic Sa Systeme de connexion electrique et carte a memoire faisant application de ce systeme
DE3019207A1 (de) * 1980-05-20 1981-11-26 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Traegerelement fuer einen ic-chip
US4549247A (en) * 1980-11-21 1985-10-22 Gao Gesellschaft Fur Automation Und Organisation Mbh Carrier element for IC-modules
DE3336606A1 (de) * 1983-10-07 1985-04-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zur mikropackherstellung
FR2584235B1 (fr) * 1985-06-26 1988-04-22 Bull Sa Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques
DE3686990T2 (de) * 1985-08-23 1993-04-22 Nippon Electric Co Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird.
JPH074995B2 (ja) * 1986-05-20 1995-01-25 株式会社東芝 Ｉｃカ−ド及びその製造方法
FR2599165A1 (fr) * 1986-05-21 1987-11-27 Michot Gerard Objet associe a un element electronique et procede d'obtention

Also Published As

Publication number Publication date
JPH01198351A (ja) 1989-08-09
JP2931864B2 (ja) 1999-08-09
DE3877550T2 (de) 1993-05-13
US4941257A (en) 1990-07-17
EP0323295B1 (fr) 1993-01-13
EP0323295A1 (fr) 1989-07-05
DE3877550D1 (de) 1993-02-25
FR2625067B1 (ko) 1995-05-19
FR2625067A1 (fr) 1989-06-23

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