KR890003026A - 고속 고집적 반도체소자(BiCMOS)의 제조방법 - Google Patents
고속 고집적 반도체소자(BiCMOS)의 제조방법 Download PDFInfo
- Publication number
- KR890003026A KR890003026A KR1019870008119A KR870008119A KR890003026A KR 890003026 A KR890003026 A KR 890003026A KR 1019870008119 A KR1019870008119 A KR 1019870008119A KR 870008119 A KR870008119 A KR 870008119A KR 890003026 A KR890003026 A KR 890003026A
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- KR
- South Korea
- Prior art keywords
- oxide film
- impurities
- film
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- grown
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 3
- 230000010354 integration Effects 0.000 title claims 2
- 239000004065 semiconductor Substances 0.000 title claims 2
- 239000012535 impurity Substances 0.000 claims 6
- 238000000151 deposition Methods 0.000 claims 3
- 238000000034 method Methods 0.000 claims 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 3
- 238000010438 heat treatment Methods 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 claims 2
- 238000002955 isolation Methods 0.000 claims 2
- 229920002120 photoresistant polymer Polymers 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 229910052796 boron Inorganic materials 0.000 claims 1
- 230000008021 deposition Effects 0.000 claims 1
- 238000005137 deposition process Methods 0.000 claims 1
- 238000009792 diffusion process Methods 0.000 claims 1
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/011—Bipolar transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
내용없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 3도는 본 발명의 혼합형소자 제조공정을 설명하기 위한 단면도. 제 4도는 본 발명의 완성된 혼합형소자의 단면도.
Claims (1)
- P형 기판에 n+형매몰층(1)을 형성하고 그 위에 에피텍설층을 성장시킨후 P웰 정의를 위한 산화막 성장 및 마스크 공정을 하고 불순물보론주입후 기판까지 열확산하여 P웰(2)을 형성하며 그위에 산화막을 성장후 질화막을 증착하고 P+접합격리(4)를 만든다음 산화막을 성장하여 소자격리(3)을 완성하고 산화막제거후 CMOS의 게이트산화막(5)을 성장시킨후 불순물을 이온주입하여 바이폴라 트랜지스터의 베이스(6)와 콜랙터(7)를 만들고 감광막제거후 다결정 실리콘을 증착시킨다음 불순물을 주입하여 n+형으로 만들어 그위에 산화막 증착후 CMOS소자의 게이트(8)와 바이폴라 트랜지스터의 에미터(9)와 콜렉터(10)를 형성한 다음 불순물을 부입하여 PMOS소자의 소오스/드레인(11)을 만들고 마스크작업부 불순물을 주입하여NMOS소자의 소오스/트레인(12)을 만들어산화막을 증착한후 식각하여 n+형 실리콘 측면에 산화막(13)이 남도록 한 다음 다결정 실리콘을 증착한후 불순물을 열확산이나 이온주입 방법으로 도우핑시켜 P+형으로 만들어 열처리함으로써 저항성분이 낮은 P+형 비활성 베이스영역(15)을 형성한 후 상기 다결정 실리콘이 바이폴라트랜지스터의 베이스(16)에만 남도록 마스크작업부 감광막을 제거한 다음 CMOS소자의 소오스/트레인을 위한 열처리 산화막증착 접촉마스크 알루미늄증착공정 등을 거쳐 형성하여서 된 것을 특징으로 하는 고속 고집적 반도체소자(BiCMOS)의 제조방법※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870008119A KR890003827B1 (ko) | 1987-07-25 | 1987-07-25 | 고속 고집적 반도체소자(Bicmos)의 제조방법 |
JP63178271A JPH065706B2 (ja) | 1987-07-25 | 1988-07-19 | BiCMOS素子の製造方法 |
US07/224,020 US4954456A (en) | 1987-07-25 | 1988-07-25 | Fabrication method for high speed and high packing density semiconductor device (BiCMOS) |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870008119A KR890003827B1 (ko) | 1987-07-25 | 1987-07-25 | 고속 고집적 반도체소자(Bicmos)의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890003026A true KR890003026A (ko) | 1989-04-12 |
KR890003827B1 KR890003827B1 (ko) | 1989-10-05 |
Family
ID=19263293
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870008119A KR890003827B1 (ko) | 1987-07-25 | 1987-07-25 | 고속 고집적 반도체소자(Bicmos)의 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4954456A (ko) |
JP (1) | JPH065706B2 (ko) |
KR (1) | KR890003827B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100402845B1 (ko) * | 1997-09-25 | 2004-03-20 | 가부시끼가이샤 도시바 | 액정표시장치의제조방법 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5011784A (en) * | 1988-01-21 | 1991-04-30 | Exar Corporation | Method of making a complementary BiCMOS process with isolated vertical PNP transistors |
US5262345A (en) * | 1990-01-25 | 1993-11-16 | Analog Devices, Inc. | Complimentary bipolar/CMOS fabrication method |
US5001073A (en) * | 1990-07-16 | 1991-03-19 | Sprague Electric Company | Method for making bipolar/CMOS IC with isolated vertical PNP |
WO1993016494A1 (en) * | 1992-01-31 | 1993-08-19 | Analog Devices, Inc. | Complementary bipolar polysilicon emitter devices |
EP1710842B1 (en) | 1999-03-15 | 2008-11-12 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating a bipolar transistor and a MISFET semiconductor device |
KR20040060474A (ko) * | 2002-12-30 | 2004-07-06 | 동부전자 주식회사 | 임베디드 반도체 장치의 소자 분리 구조물의 형성 방법 |
US7163856B2 (en) * | 2003-11-13 | 2007-01-16 | Volterra Semiconductor Corporation | Method of fabricating a lateral double-diffused mosfet (LDMOS) transistor and a conventional CMOS transistor |
US7220633B2 (en) * | 2003-11-13 | 2007-05-22 | Volterra Semiconductor Corporation | Method of fabricating a lateral double-diffused MOSFET |
US8089125B2 (en) * | 2007-06-07 | 2012-01-03 | Advanced Micro Devices, Inc. | Integrated circuit system with triode |
JP5755939B2 (ja) * | 2011-05-24 | 2015-07-29 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置及びその製造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR880000483B1 (ko) * | 1985-08-05 | 1988-04-07 | 재단법인 한국전자통신 연구소 | 반도체소자의 제조방법 |
JP2537936B2 (ja) * | 1986-04-23 | 1996-09-25 | エイ・ティ・アンド・ティ・コーポレーション | 半導体デバイスの製作プロセス |
-
1987
- 1987-07-25 KR KR1019870008119A patent/KR890003827B1/ko not_active IP Right Cessation
-
1988
- 1988-07-19 JP JP63178271A patent/JPH065706B2/ja not_active Expired - Lifetime
- 1988-07-25 US US07/224,020 patent/US4954456A/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100402845B1 (ko) * | 1997-09-25 | 2004-03-20 | 가부시끼가이샤 도시바 | 액정표시장치의제조방법 |
Also Published As
Publication number | Publication date |
---|---|
JPH065706B2 (ja) | 1994-01-19 |
JPH0193159A (ja) | 1989-04-12 |
KR890003827B1 (ko) | 1989-10-05 |
US4954456A (en) | 1990-09-04 |
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