JPS57115857A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device with a small parasitic capacitance performing a high speed logical operation by a method wherein a semiconductor layer is formed on a substrate hving dielectric property such as sapphire, and on the surface of it a bipolar transistor is provided. CONSTITUTION:On a sapphire substrate 10 whose surface is mirror polished an N<-> type Si layer 11 is grown by epitaxial growth, its surface is covered by an SiO2 film 12 and by removing a part of this an N<+> type buried layer 13 which reaches the substrate 10 is formed by diffusion in a part of the layer 11. Next after the film 12 is removed, on all surface an N<-> type layer 14 is grown epitaxually, and by ion implanted using an SiO2 film 15 as a mask a P type base region 16 for a bipolar transistor element which reaches the layer 13, a P type isolation region 17 which reaches the substrate 10, and a P type region 18 for an N channel MOSFET element are formed. Subsequently a P<+> type base contact region 23 and an N<+> type emitter region 26 in the region 16, an N<+> type emitter region 26 in the region 16, an N<+> collector contact region 27 and P<+> type source-drain regions 24 and 25 in a layer 14 between which the region 17 is put, and an N<+> type source-drain regions 28 and 29 in the region 18 are individually formed by diffusion.