KR850002676A - 집적회로 칩팩키지 - Google Patents
집적회로 칩팩키지 Download PDFInfo
- Publication number
- KR850002676A KR850002676A KR1019840003623A KR840003623A KR850002676A KR 850002676 A KR850002676 A KR 850002676A KR 1019840003623 A KR1019840003623 A KR 1019840003623A KR 840003623 A KR840003623 A KR 840003623A KR 850002676 A KR850002676 A KR 850002676A
- Authority
- KR
- South Korea
- Prior art keywords
- integrated circuit
- protective layer
- circuit chip
- chip package
- chip
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims 7
- 239000000463 material Substances 0.000 claims 4
- 239000008393 encapsulating agent Substances 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 1
- 238000005538 encapsulation Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 229920002379 silicone rubber Polymers 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도면은 본 발명의 실시예에 따른 반도체 장치의 단면도.
Claims (6)
- 봉합된 반도체장치로서 칩위의 패드(11,12)로부터 리드까지 연장된 도선(15,16)에 의해 금속리드(13,14)에 전기적으로 상호 연결된 반도체칩을 구비하고 있으며, 상기 도선에는 아치(25,26)부분이 포함되어 있고, 상기 도선과 칩의 표면위에 형성된 보호층과, 상기 칩과 보호층 및 상기 리드부분을 감싸고 있는 플래스틱 봉합물질(22)을 구비하고 있는 반도체 장치에 있어서, 상기 보호층은 충분한 두께를 가지어 칩의 표면에 대해 45도보다 적게 도선의 경사부분이 처음 변하는 아치부분(19)을 최소한 덮을 수 있으며, 상기 층은 큰 팽창계수와 낮은 전단탄성계수를 가진 재질로 구비되는 것을 특징으로 하는 집적회로 칩팩키지.
- 제1항의 장치에 있어서, 보호층은 실리콘 고무인 것을 특징으로 하는 집적회로 칩팩키지.
- 제2항의 장치에 있어서, 보호층의 두께가 칩패드위의 면에서 약 0.25㎜인 것을 특징으로 하는 집적회로 칩팩키지.
- 제1항의 장치에 있어서, 공기갭이 보호층과 플래스틱 봉합체 사이에서 25 내지 125㎜정도 범위로 칩패드위의 면을 형성되어 있는 것을 특징으로 하는 집적회로 칩팩키지.
- 제1항의 장치에 있어서, 보호층 재료는 팽창계수가 200ppm/℃보다 크고 전단탄성계수가 -40℃와 150℃사이에서 100psi보다 적은 것을 특징으로 하는 집적회로 칩팩키지.
- 제1항의 장치에 있어서, 플래스틱 봉합재료는 팽창계수가 -40℃와 125℃사이에서 25ppm/℃보다 적은 재료로 구비되어 있는 것을 특징으로 하는 집적회로 칩팩키지.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/526,413 USH73H (en) | 1983-08-25 | 1983-08-25 | Integrated circuit packages |
US526413 | 1983-08-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR850002676A true KR850002676A (ko) | 1985-05-15 |
Family
ID=24097238
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019840003623A KR850002676A (ko) | 1983-08-25 | 1984-06-26 | 집적회로 칩팩키지 |
Country Status (3)
Country | Link |
---|---|
US (1) | USH73H (ko) |
JP (1) | JPS6072251A (ko) |
KR (1) | KR850002676A (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5331205A (en) * | 1992-02-21 | 1994-07-19 | Motorola, Inc. | Molded plastic package with wire protection |
JP3353526B2 (ja) * | 1995-03-23 | 2002-12-03 | 株式会社デンソー | 半導体パッケージ及びその製造方法 |
US6576988B2 (en) * | 1999-08-30 | 2003-06-10 | Micron Technology, Inc. | Semiconductor package |
DE10137666A1 (de) * | 2001-08-01 | 2003-02-27 | Infineon Technologies Ag | Schutzvorrichtung für Baugruppen und Verfahren zu ihrer Herstellung |
US7651891B1 (en) * | 2007-08-09 | 2010-01-26 | National Semiconductor Corporation | Integrated circuit package with stress reduction |
US8125784B2 (en) * | 2008-08-13 | 2012-02-28 | Continental Automative Systems, Inc. | Seal apparatus and method of manufacturing the same |
JP6626294B2 (ja) * | 2015-09-04 | 2019-12-25 | 株式会社東芝 | 半導体装置および光結合装置 |
-
1983
- 1983-08-25 US US06/526,413 patent/USH73H/en not_active Abandoned
-
1984
- 1984-06-26 KR KR1019840003623A patent/KR850002676A/ko not_active Application Discontinuation
- 1984-08-24 JP JP59175338A patent/JPS6072251A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
USH73H (en) | 1986-06-03 |
JPS6072251A (ja) | 1985-04-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |