JPS5588357A - Resin mold semiconductor device - Google Patents
Resin mold semiconductor deviceInfo
- Publication number
- JPS5588357A JPS5588357A JP15986178A JP15986178A JPS5588357A JP S5588357 A JPS5588357 A JP S5588357A JP 15986178 A JP15986178 A JP 15986178A JP 15986178 A JP15986178 A JP 15986178A JP S5588357 A JPS5588357 A JP S5588357A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- resin
- high heat
- heat conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To prevent breakages of a substrate and also to improve heat-radiation characteristic by absorbing a thermal stress generated in a resin layer by a rubber layer by covering a semiconductor substrate with the first mold layer of high heat conductive rubber and the second mold layer of high heat conductive resin. CONSTITUTION:A semiconductor substrate 11 for IC having pn-junction is fixed on a tab 12, and a plural lead strip 13 arranged around the tab 12 and the substrate are connected with a bonding wire 14. The substrate 11 is first covered with a high heat conductive rubber like silicone rubber containing a large amount of inorganic insulator powder like alumina powder, BN powder, etc. to form the first mold layer 15. Next, the second mold layer 16 is formed by covering with a high heat conductive resin like epoxy resin or silicone resin containing inorganic insulator powder. Breakage of the substrate can be now prevented and also the heat-radiation characteristic can be improved by arranging to absorb the thermal stress arising in the resin layer 16 by the elastic rubber layer 15 and prevent on the substrate 11 from its influence.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15986178A JPS5588357A (en) | 1978-12-27 | 1978-12-27 | Resin mold semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15986178A JPS5588357A (en) | 1978-12-27 | 1978-12-27 | Resin mold semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5588357A true JPS5588357A (en) | 1980-07-04 |
Family
ID=15702816
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15986178A Pending JPS5588357A (en) | 1978-12-27 | 1978-12-27 | Resin mold semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5588357A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5558055A (en) * | 1978-10-24 | 1980-04-30 | Suisanchiyou Chiyoukan | Treating of euphausiacea |
JPS58110061A (en) * | 1981-12-23 | 1983-06-30 | Fujitsu Ltd | Package for semiconductor device, etc. |
JPS6177347A (en) * | 1984-09-21 | 1986-04-19 | Rohm Co Ltd | Manufacture of semiconductor device |
EP0805618A1 (en) * | 1996-04-30 | 1997-11-05 | Denki Kagaku Kogyo Kabushiki Kaisha | Heat dissipating spacer for electronic equipments |
CN100407415C (en) * | 2003-04-03 | 2008-07-30 | 信越化学工业株式会社 | Heat conduction composite chip and its mfg. method |
-
1978
- 1978-12-27 JP JP15986178A patent/JPS5588357A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5558055A (en) * | 1978-10-24 | 1980-04-30 | Suisanchiyou Chiyoukan | Treating of euphausiacea |
JPS6113773B2 (en) * | 1978-10-24 | 1986-04-15 | Suisancho Chokan | |
JPS58110061A (en) * | 1981-12-23 | 1983-06-30 | Fujitsu Ltd | Package for semiconductor device, etc. |
JPH0250622B2 (en) * | 1981-12-23 | 1990-11-02 | Fujitsu Ltd | |
JPS6177347A (en) * | 1984-09-21 | 1986-04-19 | Rohm Co Ltd | Manufacture of semiconductor device |
EP0805618A1 (en) * | 1996-04-30 | 1997-11-05 | Denki Kagaku Kogyo Kabushiki Kaisha | Heat dissipating spacer for electronic equipments |
CN100407415C (en) * | 2003-04-03 | 2008-07-30 | 信越化学工业株式会社 | Heat conduction composite chip and its mfg. method |
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