KR900001004A - 플라스틱 캡슐형 멀티칩 하이브리드 집적회로 - Google Patents
플라스틱 캡슐형 멀티칩 하이브리드 집적회로 Download PDFInfo
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- KR900001004A KR900001004A KR1019890007245A KR890007245A KR900001004A KR 900001004 A KR900001004 A KR 900001004A KR 1019890007245 A KR1019890007245 A KR 1019890007245A KR 890007245 A KR890007245 A KR 890007245A KR 900001004 A KR900001004 A KR 900001004A
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49531—Additional leads the additional leads being a wiring board
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- H—ELECTRICITY
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 플라스틱 인캡슐레이션(plastic encapsulation) 이전에 본 발명인 하이드리드 집적회로의 부분 평면도.
제2도는 제1도에 도시된 하이브리드 집적회로의 제조에 사용되는 리드 프레임의 평면도.
제3도는 다수의 절연성 필름 기판들이, 그 위에 형성된 금도금된 금속부를 분리시킨 상태로 연속 펀칭되는 가요성 절연 리본 테이프의 부분 평면도.
제4도는 플라스틱 인캡슐레이션 이후에 제1도 장치의 부분도.
제5도는 제1도의 하이브리드 집적회로의 부분 사지 분해도.
Claims (6)
- (a) 다수의 리드프레임 핑거와 핑거로 둘러 싸인 리드프레임 플래그 ; (b) 리드프레임 플래그의 표면에 접착된 절연필름, 리드프레임 플래그 표면의 영역을 노출시키는 필름내의 컷아웃, 금속성 제1플래그를 포함하는 절연필름상이 다수의 금속영역, 및 다수의 각 금속 본딩 스트립 ; (c) 제1플래그에 다이본드된 제1집적회로칩, 및 노출영역에 다이본드된 제2집적회로칩 ; (d) 제1 및 제2집적회로칩중 하나의 본딩패드와 본딩 스트립중 하나 사이에 각각 연결된 다수의 본딩 와이어 ; (e) 핑거, 리드프레임플래그, 제1 및 제2집적회로칩, 금속영역, 및 본딩와이어를 포함하는 부피를 채우는 플라스틱 인캡슐레이션으로 구성되는 것을 특징으로 하는 하이브리드 집적 회로.
- 제1항에 있어서, 제2집적회로칩이, 필름에 다이본드되었다하더라도, 필름을 통하여 열전도될 수 있는 것보다 더 큰 전력을 소비하는 것을 특징으로 하는 하이브리드 집적회로.
- 제2항에 있어서, 필름이 유리에폭시 물질로 구성되는 것을 특징으로 하는 하이브리드 구성회로.
- 제2항에 있어서, 금속영역이 금도금 구리 포일물질로 구성되는 것을 특징으로 하는 하이브리드 집적회로.
- 제2항에 있어서, 제1집적회로칩이 MOS집적회로이고, 제2집적회로는 바이폴라 집적회로인 것을 특징으로 하는 하이브리드 직접회로.
- (a) 다수의 리드프레임 핑거와 둘러 싸인 리드프레임 플래그 ; (b) 리드프레임 플래그 표면의 제1영역에 부착된 절연필름 ; 노출되어 있는 리드프레임 플래그 포면의 제2영역, 다수의 각 금속본딩 스트립을 포함하는 절연필름 상이 다수의 금속영역 ; (c) 제2영역에 다이본드된 칩 ; (d) 칩의 본딩패드와 본딩스트립중 하나 사이에 연결된 다수의 본딩와이어 ; (e) 핑거, 리드프레임 플래그, 칩, 금속영역, 및 본딩와이어를 포함하는 부피를 채우는 플라스틱 인캡슐레이션으로 구성되는 것을 특징으로 하는 하이브리드 직접회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US20158988A | 1988-06-02 | 1988-06-02 | |
US201,589 | 1988-06-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900001004A true KR900001004A (ko) | 1990-01-31 |
KR970005724B1 KR970005724B1 (ko) | 1997-04-19 |
Family
ID=22746444
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890007245A KR970005724B1 (ko) | 1988-06-02 | 1989-05-30 | 플라스틱 캡슐형 멀티칩 하이브리드 집적회로 |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH0712071B2 (ko) |
KR (1) | KR970005724B1 (ko) |
DE (1) | DE3916980A1 (ko) |
FR (1) | FR2632454A1 (ko) |
GB (1) | GB2219435B (ko) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2582013B2 (ja) * | 1991-02-08 | 1997-02-19 | 株式会社東芝 | 樹脂封止型半導体装置及びその製造方法 |
JPH02201949A (ja) * | 1989-01-30 | 1990-08-10 | Toshiba Corp | 半導体装置 |
EP0506122A3 (en) * | 1991-03-29 | 1994-09-14 | Matsushita Electric Ind Co Ltd | Power module |
US5491360A (en) * | 1994-12-28 | 1996-02-13 | National Semiconductor Corporation | Electronic package for isolated circuits |
US7625286B2 (en) | 2004-05-06 | 2009-12-01 | Sony Computer Entertainment Inc. | Electronic device and a game controller |
DE102005014746A1 (de) | 2005-03-31 | 2006-10-05 | Friwo Mobile Power Gmbh | Aktive primärseitige Schaltungsanordnung für ein Schaltnetzteil |
DE102006033175A1 (de) * | 2006-07-18 | 2008-01-24 | Robert Bosch Gmbh | Elektronikanordnung |
JP6420617B2 (ja) | 2014-09-30 | 2018-11-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0015053A1 (en) * | 1979-01-27 | 1980-09-03 | LUCAS INDUSTRIES public limited company | A method of manufacturing a semi-conductor power device assembly and an assembly thereby produced |
JPS6041249A (ja) * | 1983-08-17 | 1985-03-04 | Nec Corp | 混成集積回路装置 |
JPS60207358A (ja) * | 1984-03-30 | 1985-10-18 | Nec Kansai Ltd | ハイブリツドic |
JPS6292653U (ko) * | 1985-11-29 | 1987-06-13 |
-
1989
- 1989-05-15 GB GB8911054A patent/GB2219435B/en not_active Expired - Fee Related
- 1989-05-24 DE DE3916980A patent/DE3916980A1/de not_active Withdrawn
- 1989-05-30 KR KR1019890007245A patent/KR970005724B1/ko not_active IP Right Cessation
- 1989-06-01 JP JP1140212A patent/JPH0712071B2/ja not_active Expired - Lifetime
- 1989-06-01 FR FR8907260A patent/FR2632454A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
KR970005724B1 (ko) | 1997-04-19 |
FR2632454A1 (fr) | 1989-12-08 |
GB8911054D0 (en) | 1989-06-28 |
JPH0232558A (ja) | 1990-02-02 |
DE3916980A1 (de) | 1989-12-14 |
GB2219435B (en) | 1991-07-03 |
JPH0712071B2 (ja) | 1995-02-08 |
GB2219435A (en) | 1989-12-06 |
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