KR850002173A - 집적회로 소자내의 칩 지지패드를 접지시키기 위한방법 - Google Patents

집적회로 소자내의 칩 지지패드를 접지시키기 위한방법 Download PDF

Info

Publication number
KR850002173A
KR850002173A KR1019840004698A KR840004698A KR850002173A KR 850002173 A KR850002173 A KR 850002173A KR 1019840004698 A KR1019840004698 A KR 1019840004698A KR 840004698 A KR840004698 A KR 840004698A KR 850002173 A KR850002173 A KR 850002173A
Authority
KR
South Korea
Prior art keywords
chip
integrated circuit
bonding
bonding pads
electrically connected
Prior art date
Application number
KR1019840004698A
Other languages
English (en)
Other versions
KR930002386B1 (en
Inventor
카알 로이쉬 레이몬드
Original Assignee
글렌 에이치. 브루에슬
알. 씨. 에이 코오포레이숀
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 글렌 에이치. 브루에슬, 알. 씨. 에이 코오포레이숀 filed Critical 글렌 에이치. 브루에슬
Publication of KR850002173A publication Critical patent/KR850002173A/ko
Application granted granted Critical
Publication of KR930002386B1 publication Critical patent/KR930002386B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48617Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48624Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85203Thermocompression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • H01L2224/85207Thermosonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01058Cerium [Ce]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

내용 없음

Description

집적회로 소자내의 칩 지지패드를 접지시키기 위한방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래 기술에 따라 직접회로 칩이 설치된 리이드 프레임의 일부분과 칩지지 패드에 대한 접지를 나타낸 평면도, 제2도는 제1도와 유사한 평면도이고, 본 발명에 따른 접지연결을 도시한다. 제3도는 제2도의 변형으로서 접지 연결의 또다른 실시예를 나타낸다.

Claims (12)

  1. 집적회로 칩(20)내에 형성된 다수의 전자소자와, 상기 칩(20)을 지지하는 마운팅 패드(12)와 상기 마운팅패드(12) 및 칩(20)의 무게를 지지하도록 배치된 구조물(14)과, 상기 칩(20)에 인접한 접지 연결부(34)와 상기 칩(20)에 형성된 2개의 접합패드(30b,30c)를 포함한 집적회로 소자의 제조방법에 있어서, 상기 2개의 접합패드(30b,30c)에 전기적으로 연결되는 금속도체(46)가 상기 칩(20)위에 형성되고, 제1의 연결선(32c)의 일단이 상기 2개의 접합패드의 하나(30b)에 부착되고 상기 제1의 연결선(32c)의 타단이 상기구조물(14)에 부착되며, 그리고 제2의 연결선(32d)의 일단이 상기 2개의 접합패드(30b,30c)의 다른 하나(30c)에 부착되고, 상기 제2의 연결선(32d)의 타단이 상기 접지 연결부(34)에 부착되는 단계와, 상기 각 부착은 오옴성 접촉으로 이루어지는 것을 특징으로 하는 집적회로 소자내의 칩지지 패드를 접지시키기 위한 방법.
  2. 제1항에 있어서, 상기 집적회로 소자는 상기 칩(20)에 형성되며 상기 2개의 접합패드(30b,30c)와 제3의 접착패드(30a)를 포함하고, 전기적으로 독립된 제3의 연결선(32a)의 일단을 상기 제2의 접착패드(30a)에 부착시키고 상기 제3의 연결선의 타단을 상기 접지연결부(34)에 부착시키는 단계를 추가로 포함하는 것을 특징으로 하는 집적회로 소자내의 칩 지지 패드를 접지시키기 위한 방법.
  3. 제1항에 있어서, 상기 방법은 상기 칩(20)에 위에 금속도체(40)를 형성하여 2개의 접합패드(30b,30c)중의 하나(30b)가 상기 전자소자중의 하나에 전기적으로 연결되는 단계를 포함하는 것을 특징으로 하는 집적회로 소자내의 칩 지지 패드를 접지시키기 위한 방법.
  4. 제3항에 있어서, 상기 부착은 열 압축 접합으로 실시되는 것을 특징으로 하는 집적회로 소자내의 칩 지지 패드를 접지시키기 위한 방법.
  5. 제3항에 있어서, 상기 부착은 초음파 접합으로 실시되는 것을 특징으로 하는 집적회로 소자내의 칩 지지 패드를 접지시키기 위한 방법.
  6. 제3항에 있어서, 상기 부착은 열음파 접합으로 실시되는 것을 특징으로 하는 집적회로 소자내의 칩 지지 패드를 접지시키기 위한 방법.
  7. 집적회로 칩(20)내에 형성된 다수의 전자소자와 상기 칩(20)을 지지하는 마운팅 패드(12)와, 상기 마운팅패드(12) 및 칩(20)의 무게를 지지하도록 배치된 구조물(14)과, 상기 칩(20)에 인접한 접지 연결부(34)와 상기 칩(20)에 형성된 2개의 접합패드(30b,30c)를 포함한 집적회로 소자에 있어서, 상기 칩(20)위의 금속도체(46)가 상기 2개의 접합패드(30b,30c)에 전기적으로 연결되고,제1의 연결선(32c)의 일단이 상기 2개의 접합패드중의 하나(30b)에 전기적으로 연결되며,상기 제1의 연결선(32c)의 타단은 상기 구조물(14)에 전기적으로 연결되고, 제2의 연결선(32d)의 일단이 상기 2개의 접합패드중의 다른 하나(30c)에 전기적으로 연결되며, 상기 제2의 연결선(32d)의 타단이 상기 접지 연결부(34)와 전기적으로 연결되는 것을 특징으로 하는 집적회로 소자.
  8. 제7항에 있어서, 상기 2개의 접합패드(30b,30c)와 전기적으로 독립되어 상기 칩(20)에 형성된 제3의 접합패드(30a)와 제3의 연결선(32a)을 추가로 포함하고, 상기 제3의 연결선(32a)의 일단은 상기 3제의 접합패드(30a)에 전기적으로 연결되고, 또 상기 제3의 연결선(30a)의 다른 일단이 상기 접지연결부(34)와 전기적으로 연결되는 단계를 포함하는 것을 특징으로 하는 집적회로 소자.
  9. 제7항에 있어서, 상기 2개의 접합패드(30b,30c)중의 하나(30b)를 상기 전자소자에 전기적으로 연결하도록 상기 칩(20)위에 형성된 금속도체(40)를 포함하는 것을 특징으로 하는 집적회로 소자.
  10. 제9항에 있어서, 상기 연결선(32c,32d)들은 열압축 접합에 의해 연결되는 것을 특징으로 하는 집적회로 소자.
  11. 제9항에 있어서, 상기 연결선(32c,32d)들은 초음파접합에 의해 연결되는 것을 특징으로 하는 집적회로 소자.
  12. 제9항에 있어서, 상기 연결선(32c,32d)들은 열음파 접합으로 연결되어지는 것을 특징으로 하는 집적회로 소자.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR840004698A 1983-08-10 1984-08-07 Grounding a chip support and in an integrated circuit device KR930002386B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/521,897 US4534105A (en) 1983-08-10 1983-08-10 Method for grounding a pellet support pad in an integrated circuit device
US521897 1983-08-10

Publications (2)

Publication Number Publication Date
KR850002173A true KR850002173A (ko) 1985-05-06
KR930002386B1 KR930002386B1 (en) 1993-03-29

Family

ID=24078595

Family Applications (1)

Application Number Title Priority Date Filing Date
KR840004698A KR930002386B1 (en) 1983-08-10 1984-08-07 Grounding a chip support and in an integrated circuit device

Country Status (10)

Country Link
US (1) US4534105A (ko)
JP (1) JPS6054461A (ko)
KR (1) KR930002386B1 (ko)
DE (1) DE3428881C2 (ko)
FR (1) FR2550661B1 (ko)
GB (1) GB2144910B (ko)
IN (1) IN160929B (ko)
IT (1) IT1174170B (ko)
SE (1) SE456874B (ko)
YU (1) YU119484A (ko)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61108160A (ja) * 1984-11-01 1986-05-26 Nec Corp コンデンサ内蔵型半導体装置及びその製造方法
EP0214307B1 (en) * 1985-02-28 1991-07-17 Sony Corporation Semiconducteur circuit device
US4920406A (en) * 1986-02-07 1990-04-24 Fujitsu Limited Semiconductor device
US4829362A (en) * 1986-04-28 1989-05-09 Motorola, Inc. Lead frame with die bond flag for ceramic packages
JPS63205930A (ja) * 1987-02-21 1988-08-25 Ricoh Co Ltd 半導体集積回路装置の製造方法
JP2734463B2 (ja) * 1989-04-27 1998-03-30 株式会社日立製作所 半導体装置
JPH088330B2 (ja) * 1989-07-19 1996-01-29 日本電気株式会社 Loc型リードフレームを備えた半導体集積回路装置
US5006919A (en) * 1990-03-01 1991-04-09 Advanced Micro Devices, Inc. Integrated circuit package
JP3011510B2 (ja) * 1990-12-20 2000-02-21 株式会社東芝 相互連結回路基板を有する半導体装置およびその製造方法
KR920018907A (ko) * 1991-03-23 1992-10-22 김광호 반도체 리드 프레임
KR940006187Y1 (ko) * 1991-10-15 1994-09-10 금성일렉트론 주식회사 반도체장치
KR100552353B1 (ko) * 1992-03-27 2006-06-20 가부시키가이샤 히타치초엘에스아이시스템즈 리이드프레임및그것을사용한반도체집적회로장치와그제조방법
US5256598A (en) * 1992-04-15 1993-10-26 Micron Technology, Inc. Shrink accommodating lead frame
KR0177744B1 (ko) * 1995-08-14 1999-03-20 김광호 전기적 특성이 향상된 반도체 장치
US5986334A (en) * 1996-10-04 1999-11-16 Anam Industrial Co., Ltd. Semiconductor package having light, thin, simple and compact structure
EP0954879A1 (de) * 1997-01-22 1999-11-10 Siemens Aktiengesellschaft Elektronisches bauelement
US5780772A (en) * 1997-01-24 1998-07-14 National Semiconductor Corporation Solution to mold wire sweep in fine pitch devices
IT1317559B1 (it) * 2000-05-23 2003-07-09 St Microelectronics Srl Telaio di supporto per chip avente interconnessioni a bassa resistenza.
US20050230850A1 (en) * 2004-04-20 2005-10-20 Taggart Brian C Microelectronic assembly having a redistribution conductor over a microelectronic die
US8258611B2 (en) * 2007-07-23 2012-09-04 Nxp B.V. Leadframe structure for electronic packages
CN102201384A (zh) * 2010-03-22 2011-09-28 无锡华润安盛科技有限公司 一种led驱动电路的小外形封装引线框
US9337240B1 (en) * 2010-06-18 2016-05-10 Altera Corporation Integrated circuit package with a universal lead frame
CN102569233A (zh) * 2010-12-09 2012-07-11 登丰微电子股份有限公司 封装结构

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3685137A (en) * 1971-05-13 1972-08-22 Rca Corp Method for manufacturing wire bonded integrated circuit devices
US3611061A (en) * 1971-07-07 1971-10-05 Motorola Inc Multiple lead integrated circuit device and frame member for the fabrication thereof
US4065851A (en) * 1974-04-20 1978-01-03 W. C. Heraeus Gmbh Method of making metallic support carrier for semiconductor elements
US4068371A (en) * 1976-07-12 1978-01-17 Miller Charles F Method for completing wire bonds
US4142203A (en) * 1976-12-20 1979-02-27 Avx Corporation Method of assembling a hermetically sealed semiconductor unit
JPS5623759A (en) * 1979-08-01 1981-03-06 Hitachi Ltd Resin-sealed semiconductor device and manufacture thereof
JPS5662352A (en) * 1979-10-26 1981-05-28 Hitachi Ltd Semiconductor integrated circuit device for acoustic amplification circuit
DE3023528C2 (de) * 1980-06-24 1984-11-29 W.C. Heraeus Gmbh, 6450 Hanau Aluminium enthaltender Feinstdraht
GB2091035B (en) * 1981-01-12 1985-01-09 Avx Corp Integrated circuit device and sub-assembly
US4454529A (en) * 1981-01-12 1984-06-12 Avx Corporation Integrated circuit device having internal dampening for a plurality of power supplies

Also Published As

Publication number Publication date
SE8403978L (sv) 1985-02-11
IT1174170B (it) 1987-07-01
KR930002386B1 (en) 1993-03-29
IN160929B (ko) 1987-08-15
FR2550661A1 (fr) 1985-02-15
SE456874B (sv) 1988-11-07
GB2144910B (en) 1986-12-31
SE8403978D0 (sv) 1984-08-03
US4534105A (en) 1985-08-13
IT8421350A0 (it) 1984-06-11
GB8419078D0 (en) 1984-08-30
DE3428881C2 (de) 1996-05-09
FR2550661B1 (fr) 1988-11-25
JPH0469432B2 (ko) 1992-11-06
DE3428881A1 (de) 1985-02-28
JPS6054461A (ja) 1985-03-28
GB2144910A (en) 1985-03-13
YU119484A (en) 1987-08-31

Similar Documents

Publication Publication Date Title
KR850002173A (ko) 집적회로 소자내의 칩 지지패드를 접지시키기 위한방법
US5869886A (en) Flip chip semiconductor mounting structure with electrically conductive resin
KR970013236A (ko) 금속 회로 기판을 갖는 칩 스케일 패키지
KR940022755A (ko) 반도체 장치 및 그 제조방법과 반도체장치용 리드프레임(Lead frame)
TW358230B (en) Semiconductor package
KR900005586A (ko) 반도체 디바이스 및 그 형성 방법
KR960019674A (ko) 측면 고도가 낮은 볼-그리드 어레이 반도체 패키지 및 그 제조 방법
JPS61500245A (ja) リ−ドフレ−ム・チップ支持部を含む半導体集積回路
KR890007410A (ko) 반도체 장치
KR900005587A (ko) 반도체 디바이스 및 그 제작방법
KR960026505A (ko) 반도체 장치 및 그 제조방법
KR970030750A (ko) 반도체장치 및 그것을 사용한 전자장치
KR0137719B1 (ko) 종방향 표면 장착형 반도체 장치
US6445067B1 (en) Integrated circuit package electrical enhancement
US7193303B2 (en) Supporting frame for surface-mount diode package
DE3482719D1 (de) Halbleiterelement und herstellungsverfahren.
KR910001956A (ko) 반도체장치
US5874783A (en) Semiconductor device having the inner end of connector leads displaced onto the surface of semiconductor chip
FR2760289B1 (fr) Boitier de puce de semiconducteur ayant une structure combinee de conducteurs situes sur la puce et de conducteurs normaux standards
JPH06103731B2 (ja) 半導体パッケ−ジ
KR930007920Y1 (ko) 양면 박막회로판을 갖는 이중 패키지 구조
KR920018913A (ko) 반도체 장치 및 그의 제조 방법
KR200154809Y1 (ko) 표면탄성파 필터의 리드프레임
KR910010675A (ko) 반도체장치
JPH054279Y2 (ko)

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee