KR20170105493A - 더 양호한 신호 품질을 위한 신규한 고속 신호 라우팅 토폴로지 - Google Patents

더 양호한 신호 품질을 위한 신규한 고속 신호 라우팅 토폴로지 Download PDF

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Publication number
KR20170105493A
KR20170105493A KR1020177017078A KR20177017078A KR20170105493A KR 20170105493 A KR20170105493 A KR 20170105493A KR 1020177017078 A KR1020177017078 A KR 1020177017078A KR 20177017078 A KR20177017078 A KR 20177017078A KR 20170105493 A KR20170105493 A KR 20170105493A
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KR
South Korea
Prior art keywords
signal
transmission line
pcb
chips
output driver
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Abandoned
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KR1020177017078A
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English (en)
Korean (ko)
Inventor
요케쉬 수브라마니안
Original Assignee
퀄컴 인코포레이티드
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Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20170105493A publication Critical patent/KR20170105493A/ko
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0246—Termination of transmission lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0248—Skew reduction or using delay lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09254—Branched layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Structure Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1020177017078A 2015-01-12 2016-01-11 더 양호한 신호 품질을 위한 신규한 고속 신호 라우팅 토폴로지 Abandoned KR20170105493A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/595,175 US9980366B2 (en) 2015-01-12 2015-01-12 High speed signal routing topology for better signal quality
US14/595,175 2015-01-12
PCT/US2016/012912 WO2016115056A2 (en) 2015-01-12 2016-01-11 A novel high speed signal routing topology for better signal quality

Publications (1)

Publication Number Publication Date
KR20170105493A true KR20170105493A (ko) 2017-09-19

Family

ID=55361943

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020177017078A Abandoned KR20170105493A (ko) 2015-01-12 2016-01-11 더 양호한 신호 품질을 위한 신규한 고속 신호 라우팅 토폴로지

Country Status (6)

Country Link
US (2) US9980366B2 (enExample)
EP (1) EP3245853B1 (enExample)
JP (1) JP2018506897A (enExample)
KR (1) KR20170105493A (enExample)
CN (1) CN107112040B (enExample)
WO (1) WO2016115056A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12362313B2 (en) 2021-07-09 2025-07-15 Samsung Electronics Co., Ltd. Semiconductor package with balanced wiring structure

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9980366B2 (en) 2015-01-12 2018-05-22 Qualcomm Incorporated High speed signal routing topology for better signal quality
US10718851B2 (en) * 2016-02-02 2020-07-21 Qualcomm Incorporated Displacement and rotation measurement for unmanned aerial vehicles
KR102640968B1 (ko) 2018-05-29 2024-02-27 삼성전자주식회사 인쇄 회로 기판, 스토리지 장치, 및 인쇄 회로 기판을 포함하는 스토리지 장치
KR20220066445A (ko) 2020-11-16 2022-05-24 삼성전자주식회사 모듈 보드 및 이를 포함하는 메모리 모듈
CN113316319B (zh) * 2021-05-08 2022-11-11 珠海全志科技股份有限公司 智能设备、可读存储介质、印刷电路板及其使用方法
KR20230000483A (ko) * 2021-06-24 2023-01-03 삼성전자주식회사 전자 장치, 및 인쇄 회로 기판을 포함하는 전자 장치

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FR2631169B1 (fr) 1988-05-04 1990-07-13 Cit Alcatel Dispositif de distribution de signaux numeriques a tres hauts debits
JP3957237B2 (ja) 1998-01-19 2007-08-15 富士通株式会社 集積回路装置モジュール
JP2001084070A (ja) * 1999-09-10 2001-03-30 Toshiba Corp プリント配線基板及び電子機器のプリント配線基板
US6545875B1 (en) * 2000-05-10 2003-04-08 Rambus, Inc. Multiple channel modules and bus systems using same
US6573757B1 (en) 2000-09-11 2003-06-03 Cypress Semiconductor Corp. Signal line matching technique for ICS/PCBS
JP3808335B2 (ja) 2001-07-26 2006-08-09 エルピーダメモリ株式会社 メモリモジュール
JP3886425B2 (ja) * 2002-07-29 2007-02-28 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
JP4094370B2 (ja) 2002-07-31 2008-06-04 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
JP2004254155A (ja) * 2003-02-21 2004-09-09 Kanji Otsuka 信号伝送装置および配線構造
US6947304B1 (en) 2003-05-12 2005-09-20 Pericon Semiconductor Corp. DDR memory modules with input buffers driving split traces with trace-impedance matching at trace junctions
US7245145B2 (en) 2003-06-11 2007-07-17 Micron Technology, Inc. Memory module and method having improved signal routing topology
US7535321B1 (en) 2006-01-17 2009-05-19 Xilinx, Inc. Method and apparatus for a printed circuit board (PCB) embedded filter
KR100689967B1 (ko) 2006-02-03 2007-03-08 삼성전자주식회사 개선된 멀티 모듈 메모리 버스 구조를 가진 메모리 시스템
JP5696301B2 (ja) 2007-09-28 2015-04-08 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． アドレス線配線構造及びこれを有するプリント配線基板
DE102008045707A1 (de) 2008-09-04 2010-03-11 Micronas Gmbh Leiterplatine mit Terminierung einer T-förmigen Signalleitung
US8933718B2 (en) * 2008-09-19 2015-01-13 Advantest (Singapore) Pte Ltd Signal distribution structure and method for distributing a signal
US8213206B2 (en) * 2010-01-15 2012-07-03 Mediatek Inc. Electronic apparatus
CN103812497B (zh) * 2012-11-06 2017-02-15 珠海全志科技股份有限公司 驱动器及低抖动串行信号的输出方法
CN103093064A (zh) * 2013-02-19 2013-05-08 浪潮电子信息产业股份有限公司 一种pcb高速信号线轨迹控制方法
US9253875B2 (en) * 2013-05-15 2016-02-02 Intel IP Corporation Isolating differential transmission lines
US9980366B2 (en) 2015-01-12 2018-05-22 Qualcomm Incorporated High speed signal routing topology for better signal quality

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12362313B2 (en) 2021-07-09 2025-07-15 Samsung Electronics Co., Ltd. Semiconductor package with balanced wiring structure

Also Published As

Publication number Publication date
EP3245853B1 (en) 2018-09-26
WO2016115056A2 (en) 2016-07-21
WO2016115056A3 (en) 2016-09-09
CN107112040A (zh) 2017-08-29
JP2018506897A (ja) 2018-03-08
EP3245853A2 (en) 2017-11-22
US20180220524A1 (en) 2018-08-02
US9980366B2 (en) 2018-05-22
US20160205767A1 (en) 2016-07-14
US10039183B1 (en) 2018-07-31
CN107112040B (zh) 2020-10-30

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