JP5696301B2 - アドレス線配線構造及びこれを有するプリント配線基板 - Google Patents
アドレス線配線構造及びこれを有するプリント配線基板 Download PDFInfo
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- JP5696301B2 JP5696301B2 JP2007253470A JP2007253470A JP5696301B2 JP 5696301 B2 JP5696301 B2 JP 5696301B2 JP 2007253470 A JP2007253470 A JP 2007253470A JP 2007253470 A JP2007253470 A JP 2007253470A JP 5696301 B2 JP5696301 B2 JP 5696301B2
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09254—Branched layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09263—Meander
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10159—Memory
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Memory System (AREA)
Description
図1〜図10を用いて本発明の第1の実施例を説明する。
102R・・・分岐点S2−S3間の配線
120R・・・終端Vtt
122R・・・終端抵抗
300・・・・メモリ基板(Dimm基板)
302・・・・バッファ素子
304R〜307R、313R〜317R、304L〜307L、313L〜317L・・・メモリ素子
1510・・・サーバ装置
1520・・・CPU基板
1522・・・CPU
1524・・・メモリコントローラ
1530・・・メモリ基板(Dimm基板)
Claims (5)
- 少なくとも3つのメモリ素子とこれら3つのメモリ素子とデータを授受する素子との間を、前記メモリ素子のアドレス信号を伝送するアドレス信号線で結び、該アドレス信号線は、主線から各メモリ素子に支線が分岐するスタブ構造を有するアドレス線配線構造において、
前記データを授受する素子のアドレス端子の出力インピーダンスが、前記アドレス信号線の線路の特性インピーダンスよりも低く、
前記データを授受する素子から該データを授受する素子に最も近い距離で支線が分岐する分岐点S1までの距離TL0が、前記分岐点S1から2番目に支線が分岐する分岐点S2までの距離TL1と等しいか、あるいは長く、
前記分岐点S2から3番目に支線が分岐する分岐点S3までの距離TL3が、前記距離TL0及びTL1よりも長いことを特徴とするアドレス線配線構造。 - 少なくとも3つのメモリ素子とこれら3つのメモリ素子とデータを授受する素子との間を、前記メモリ素子のアドレス信号を伝送するアドレス信号線で結び、該アドレス信号線は、主線から各メモリ素子に支線が分岐するスタブ構造を有するアドレス線配線構造において、
前記データを授受する素子のアドレス端子の出力インピーダンスが、前記アドレス信号線の線路の特性インピーダンスよりも低く、
前記データを授受する素子から該データを授受する素子に最も近い距離で支線が分岐する分岐点S1までの距離TL0が、前記分岐点S1から2番目に支線が分岐する分岐点S2までの距離TL1と等しく、
前記分岐点S2から3番目に支線が分岐する分岐点S3までの距離TL3が、前記距離TL0及びTL1よりも長いことを特徴とするアドレス線配線構造。 - 請求項1又は2に記載のアドレス線配線構造において、前記距離TL3の二倍の距離を信号が伝播する時間を、アドレス信号が、前記分岐点S2から分岐する支線に接続したメモリ素子の0と1を識別するスレッショルド電圧値を超えるまでの立ち上がり時間よりも長くしたことを特徴とするアドレス線配線構造。
- 請求項1〜3のいずれか1項に記載のアドレス線配線構造を有するプリント配線基板。
- 請求項4に記載のプリント配線基板を有する情報処理装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007253470A JP5696301B2 (ja) | 2007-09-28 | 2007-09-28 | アドレス線配線構造及びこれを有するプリント配線基板 |
US12/239,900 US8134239B2 (en) | 2007-09-28 | 2008-09-29 | Address line wiring structure and printed wiring board having same |
US13/363,396 US8922029B2 (en) | 2007-09-28 | 2012-02-01 | Apparatus having a wiring board and memory devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007253470A JP5696301B2 (ja) | 2007-09-28 | 2007-09-28 | アドレス線配線構造及びこれを有するプリント配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009086841A JP2009086841A (ja) | 2009-04-23 |
JP5696301B2 true JP5696301B2 (ja) | 2015-04-08 |
Family
ID=40508091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007253470A Expired - Fee Related JP5696301B2 (ja) | 2007-09-28 | 2007-09-28 | アドレス線配線構造及びこれを有するプリント配線基板 |
Country Status (2)
Country | Link |
---|---|
US (2) | US8134239B2 (ja) |
JP (1) | JP5696301B2 (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5696301B2 (ja) * | 2007-09-28 | 2015-04-08 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | アドレス線配線構造及びこれを有するプリント配線基板 |
JP5716604B2 (ja) * | 2011-08-08 | 2015-05-13 | 富士通株式会社 | 回路シミュレータプログラム,装置およびアイパターン生成方法 |
US9082464B2 (en) * | 2012-02-14 | 2015-07-14 | Samsung Electronics Co., Ltd. | Memory module for high-speed operations |
US9412423B2 (en) * | 2012-03-15 | 2016-08-09 | Samsung Electronics Co., Ltd. | Memory modules including plural memory devices arranged in rows and module resistor units |
JP5930887B2 (ja) * | 2012-07-05 | 2016-06-08 | 株式会社日立製作所 | 信号伝送回路 |
JP6091239B2 (ja) * | 2013-02-13 | 2017-03-08 | キヤノン株式会社 | プリント回路板、プリント配線板および電子機器 |
KR20140121181A (ko) | 2013-04-05 | 2014-10-15 | 삼성전자주식회사 | 인쇄회로기판 및 이를 포함하는 메모리 모듈 |
US9361254B2 (en) * | 2013-08-09 | 2016-06-07 | Nvidia Corporation | Memory device formed with a semiconductor interposer |
JP5925352B2 (ja) | 2014-04-14 | 2016-05-25 | キヤノン株式会社 | プリント回路板及びプリント配線板 |
JP2016029785A (ja) * | 2014-07-18 | 2016-03-03 | 株式会社東芝 | 通信システム |
US9980366B2 (en) | 2015-01-12 | 2018-05-22 | Qualcomm Incorporated | High speed signal routing topology for better signal quality |
KR102596491B1 (ko) | 2016-12-13 | 2023-10-30 | 삼성전자주식회사 | 반도체 장치 |
KR102640968B1 (ko) * | 2018-05-29 | 2024-02-27 | 삼성전자주식회사 | 인쇄 회로 기판, 스토리지 장치, 및 인쇄 회로 기판을 포함하는 스토리지 장치 |
JP7469978B2 (ja) | 2020-07-22 | 2024-04-17 | 株式会社日立製作所 | プリント配線板及び情報処理装置 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5394121A (en) * | 1993-10-15 | 1995-02-28 | International Business Machines Corporation | Wiring topology for transfer of electrical signals |
JP3339521B2 (ja) | 1994-03-08 | 2002-10-28 | 株式会社日立製作所 | 信号伝送回路 |
US6125419A (en) * | 1996-06-13 | 2000-09-26 | Hitachi, Ltd. | Bus system, printed circuit board, signal transmission line, series circuit and memory module |
JP3880286B2 (ja) * | 1999-05-12 | 2007-02-14 | エルピーダメモリ株式会社 | 方向性結合式メモリシステム |
KR100399594B1 (ko) * | 2000-05-04 | 2003-09-26 | 삼성전자주식회사 | 시스템 보드 및 이 보드의 임피이던스 조절 방법 |
US6545875B1 (en) * | 2000-05-10 | 2003-04-08 | Rambus, Inc. | Multiple channel modules and bus systems using same |
US7610447B2 (en) * | 2001-02-28 | 2009-10-27 | Rambus Inc. | Upgradable memory system with reconfigurable interconnect |
JP3808335B2 (ja) * | 2001-07-26 | 2006-08-09 | エルピーダメモリ株式会社 | メモリモジュール |
JP3821678B2 (ja) * | 2001-09-06 | 2006-09-13 | エルピーダメモリ株式会社 | メモリ装置 |
JP3886425B2 (ja) | 2002-07-29 | 2007-02-28 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
US6947304B1 (en) * | 2003-05-12 | 2005-09-20 | Pericon Semiconductor Corp. | DDR memory modules with input buffers driving split traces with trace-impedance matching at trace junctions |
US7245145B2 (en) * | 2003-06-11 | 2007-07-17 | Micron Technology, Inc. | Memory module and method having improved signal routing topology |
US20050052912A1 (en) * | 2003-09-04 | 2005-03-10 | Mike Cogdill | Circuit and system for addressing memory modules |
US7307862B2 (en) * | 2003-09-04 | 2007-12-11 | Hewlett-Packard Development Company, L.P. | Circuit and system for accessing memory modules |
KR100689967B1 (ko) * | 2006-02-03 | 2007-03-08 | 삼성전자주식회사 | 개선된 멀티 모듈 메모리 버스 구조를 가진 메모리 시스템 |
US7389381B1 (en) * | 2006-04-05 | 2008-06-17 | Co Ramon S | Branching memory-bus module with multiple downlink ports to standard fully-buffered memory modules |
JP5696301B2 (ja) * | 2007-09-28 | 2015-04-08 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | アドレス線配線構造及びこれを有するプリント配線基板 |
US7697332B2 (en) * | 2007-12-13 | 2010-04-13 | Alcatel Lucent | Placement and routing of ECC memory devices for improved signal timing |
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2007
- 2007-09-28 JP JP2007253470A patent/JP5696301B2/ja not_active Expired - Fee Related
-
2008
- 2008-09-29 US US12/239,900 patent/US8134239B2/en active Active
-
2012
- 2012-02-01 US US13/363,396 patent/US8922029B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2009086841A (ja) | 2009-04-23 |
US20090086522A1 (en) | 2009-04-02 |
US8922029B2 (en) | 2014-12-30 |
US8134239B2 (en) | 2012-03-13 |
US20120127675A1 (en) | 2012-05-24 |
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