KR20160114710A - 반도체칩을 상호연결하기 위한 인터포저를 제공하기 위한 방법 및 장치 - Google Patents

반도체칩을 상호연결하기 위한 인터포저를 제공하기 위한 방법 및 장치 Download PDF

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KR20160114710A
KR20160114710A KR1020167023963A KR20167023963A KR20160114710A KR 20160114710 A KR20160114710 A KR 20160114710A KR 1020167023963 A KR1020167023963 A KR 1020167023963A KR 20167023963 A KR20167023963 A KR 20167023963A KR 20160114710 A KR20160114710 A KR 20160114710A
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glass substrate
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사티시 찬드라 차파라라
스콧 크리스토퍼 폴라드
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코닝 인코포레이티드
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KR1020167023963A 2014-01-31 2015-01-29 반도체칩을 상호연결하기 위한 인터포저를 제공하기 위한 방법 및 장치 Withdrawn KR20160114710A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201461934366P 2014-01-31 2014-01-31
US61/934,366 2014-01-31
PCT/US2015/013405 WO2015116749A1 (en) 2014-01-31 2015-01-29 Methods and apparatus for providing an interposer for interconnecting semiconductor chips

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KR20160114710A true KR20160114710A (ko) 2016-10-05

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KR1020167023963A Withdrawn KR20160114710A (ko) 2014-01-31 2015-01-29 반도체칩을 상호연결하기 위한 인터포저를 제공하기 위한 방법 및 장치

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US (2) US9472479B2 (enExample)
EP (1) EP3100300A1 (enExample)
JP (1) JP6505726B2 (enExample)
KR (1) KR20160114710A (enExample)
CN (1) CN106165088B (enExample)
TW (1) TWI653713B (enExample)
WO (1) WO2015116749A1 (enExample)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020180145A1 (ko) 2019-03-07 2020-09-10 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
WO2020180149A1 (ko) 2019-03-07 2020-09-10 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
WO2020185021A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
WO2020185016A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
WO2020185023A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이의 제조방법
WO2020204473A1 (ko) 2019-03-29 2020-10-08 에스케이씨 주식회사 반도체용 패키징 유리기판, 반도체용 패키징 기판 및 반도체 장치
WO2021040178A1 (ko) 2019-08-23 2021-03-04 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
US11981501B2 (en) 2019-03-12 2024-05-14 Absolics Inc. Loading cassette for substrate including glass and substrate loading method to which same is applied
KR20240139283A (ko) 2023-03-14 2024-09-23 주식회사 아크 수동 소자가 내장된 ｍｅｍｓ구조의 기판 및 반도체 패키지

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6505726B2 (ja) * 2014-01-31 2019-04-24 コーニング インコーポレイテッド 半導体チップを相互接続するためのインタポーザを提供するための方法及び装置
KR101681410B1 (ko) * 2015-04-20 2016-11-30 삼성전기주식회사 커패시터 부품
US9780044B2 (en) * 2015-04-23 2017-10-03 Palo Alto Research Center Incorporated Transient electronic device with ion-exchanged glass treated interposer
CN107851646A (zh) * 2015-07-10 2018-03-27 凸版印刷株式会社 配线基板及其制造方法
US9852988B2 (en) 2015-12-18 2017-12-26 Invensas Bonding Technologies, Inc. Increased contact alignment tolerance for direct bonding
US20170179066A1 (en) * 2015-12-18 2017-06-22 Russell S. Aoki Bulk solder removal on processor packaging
EP3479398B1 (en) 2016-07-01 2025-02-19 Intel Corporation Molded embedded bridge for enhanced emib applications
US10446487B2 (en) 2016-09-30 2019-10-15 Invensas Bonding Technologies, Inc. Interface structures and methods for forming same
US10580735B2 (en) 2016-10-07 2020-03-03 Xcelsis Corporation Stacked IC structure with system level wiring on multiple sides of the IC die
WO2018126052A1 (en) 2016-12-29 2018-07-05 Invensas Bonding Technologies, Inc. Bonded structures with integrated passive component
US20180190583A1 (en) * 2016-12-29 2018-07-05 Invensas Bonding Technologies, Inc. Bonded structures with integrated passive component
WO2018169968A1 (en) 2017-03-16 2018-09-20 Invensas Corporation Direct-bonded led arrays and applications
WO2018183739A1 (en) 2017-03-31 2018-10-04 Invensas Bonding Technologies, Inc. Interface structures and methods for forming same
DE202018006776U1 (de) 2017-06-15 2022-12-14 Chiaro Technology Limited Brustpumpensystem
US11584673B2 (en) * 2017-07-31 2023-02-21 Corning Incorporated Laminate article having a non-glass core and glass envelope and methods thereof
TWI653919B (zh) * 2017-08-10 2019-03-11 晶巧股份有限公司 高散熱等線距堆疊晶片封裝結構和方法
US10622311B2 (en) 2017-08-10 2020-04-14 International Business Machines Corporation High-density interconnecting adhesive tape
TW201936376A (zh) * 2017-12-21 2019-09-16 美商康寧公司 包含低cte玻璃層的多層隔熱玻璃單元
US11169326B2 (en) 2018-02-26 2021-11-09 Invensas Bonding Technologies, Inc. Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects
US11256004B2 (en) 2018-03-20 2022-02-22 Invensas Bonding Technologies, Inc. Direct-bonded lamination for improved image clarity in optical devices
US11515291B2 (en) 2018-08-28 2022-11-29 Adeia Semiconductor Inc. Integrated voltage regulator and passive components
US11114308B2 (en) 2018-09-25 2021-09-07 International Business Machines Corporation Controlling of height of high-density interconnection structure on substrate
US11195789B2 (en) 2018-11-30 2021-12-07 International Business Machines Corporation Integrated circuit module with a structurally balanced package using a bottom side interposer
US10707169B1 (en) * 2018-12-28 2020-07-07 Intel Corporation Ceramic interposers for on-die interconnects
US11148935B2 (en) 2019-02-22 2021-10-19 Menlo Microsystems, Inc. Full symmetric multi-throw switch using conformal pinched through via
US11901281B2 (en) 2019-03-11 2024-02-13 Adeia Semiconductor Bonding Technologies Inc. Bonded structures with integrated passive component
KR102600154B1 (ko) 2019-06-12 2023-11-07 삼성전자주식회사 반도체 패키지
US11762200B2 (en) 2019-12-17 2023-09-19 Adeia Semiconductor Bonding Technologies Inc. Bonded optical devices
GB202004395D0 (en) 2020-03-26 2020-05-13 Chiaro Technology Ltd Lima
US20230402337A1 (en) * 2020-11-16 2023-12-14 Corning Incorporated 3d interposer with through glass vias - method of increasing adhesion between copper and glass surfaces and articles therefrom
KR20220150137A (ko) 2021-05-03 2022-11-10 삼성전자주식회사 반도체 패키지
US12476176B2 (en) * 2022-03-29 2025-11-18 Intel Corporation Glass core substrate printed circuit board for warpage reduction
GB2622196A (en) 2022-08-31 2024-03-13 Chiaro Technology Ltd Measurement system
TWI834336B (zh) * 2022-10-12 2024-03-01 欣興電子股份有限公司 封裝結構及其製作方法
CN115677213B (zh) * 2022-11-16 2024-07-26 湖南兆湘光电高端装备研究院有限公司 化学强化层压玻璃制品及其制备方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4221047A (en) * 1979-03-23 1980-09-09 International Business Machines Corporation Multilayered glass-ceramic substrate for mounting of semiconductor device
US5209798A (en) * 1991-11-22 1993-05-11 Grunman Aerospace Corporation Method of forming a precisely spaced stack of substrate layers
US6399892B1 (en) 2000-09-19 2002-06-04 International Business Machines Corporation CTE compensated chip interposer
JP2003342064A (ja) * 2002-05-28 2003-12-03 Kyocera Corp ガラスセラミック焼結体および多層配線基板
JP2005050882A (ja) * 2003-07-29 2005-02-24 Kyocera Corp 積層型配線基板および電気装置並びにその実装構造
US7226654B2 (en) * 2003-07-29 2007-06-05 Kyocera Corporation Laminated wiring board and its mounting structure
US7221050B2 (en) * 2004-09-02 2007-05-22 Intel Corporation Substrate having a functionally gradient coefficient of thermal expansion
US8780576B2 (en) * 2011-09-14 2014-07-15 Invensas Corporation Low CTE interposer
US8865507B2 (en) * 2011-09-16 2014-10-21 Sionyx, Inc. Integrated visible and infrared imager devices and associated methods
JP6505726B2 (ja) * 2014-01-31 2019-04-24 コーニング インコーポレイテッド 半導体チップを相互接続するためのインタポーザを提供するための方法及び装置

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020180145A1 (ko) 2019-03-07 2020-09-10 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
WO2020180149A1 (ko) 2019-03-07 2020-09-10 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
US12165979B2 (en) 2019-03-07 2024-12-10 Absolics Inc. Packaging substrate and semiconductor apparatus comprising same
EP4057324A1 (en) 2019-03-07 2022-09-14 Absolics Inc. Packaging substrate and semiconductor apparatus comprising same
US12288742B2 (en) 2019-03-07 2025-04-29 Absolics Inc. Packaging substrate and semiconductor apparatus comprising same
US12456672B2 (en) 2019-03-12 2025-10-28 Absolics Inc. Packaging substrate having element group in cavity unit and semiconductor device comprising the same
US11981501B2 (en) 2019-03-12 2024-05-14 Absolics Inc. Loading cassette for substrate including glass and substrate loading method to which same is applied
WO2020185023A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이의 제조방법
WO2020185016A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
US12198994B2 (en) 2019-03-12 2025-01-14 Absolics Inc. Packaging substrate and method for manufacturing same
US11652039B2 (en) 2019-03-12 2023-05-16 Absolics Inc. Packaging substrate with core layer and cavity structure and semiconductor device comprising the same
WO2020185021A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
US11967542B2 (en) 2019-03-12 2024-04-23 Absolics Inc. Packaging substrate, and semiconductor device comprising same
WO2020204473A1 (ko) 2019-03-29 2020-10-08 에스케이씨 주식회사 반도체용 패키징 유리기판, 반도체용 패키징 기판 및 반도체 장치
US11437308B2 (en) 2019-03-29 2022-09-06 Absolics Inc. Packaging glass substrate for semiconductor, a packaging substrate for semiconductor, and a semiconductor apparatus
US12027454B1 (en) 2019-08-23 2024-07-02 Absolics Inc. Packaging substrate having electric power transmitting elements on non-circular core via of core vias and semiconductor device comprising the same
US11728259B2 (en) 2019-08-23 2023-08-15 Absolics Inc. Packaging substrate having electric power transmitting elements on non-circular core via of core vias and semiconductor device comprising the same
US11469167B2 (en) 2019-08-23 2022-10-11 Absolics Inc. Packaging substrate having electric power transmitting elements on non-circular core via of core vias and semiconductor device comprising the same
WO2021040178A1 (ko) 2019-08-23 2021-03-04 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
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