KR20150040893A - 다중-메모리 다이를 포함하는 반도체 패키지와 관련된 방법 및 장치 - Google Patents

다중-메모리 다이를 포함하는 반도체 패키지와 관련된 방법 및 장치 Download PDF

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KR20150040893A
KR20150040893A KR1020157002720A KR20157002720A KR20150040893A KR 20150040893 A KR20150040893 A KR 20150040893A KR 1020157002720 A KR1020157002720 A KR 1020157002720A KR 20157002720 A KR20157002720 A KR 20157002720A KR 20150040893 A KR20150040893 A KR 20150040893A
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die
substrate
memory
memory die
semiconductor
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세하트 수타르드자
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마벨 월드 트레이드 리미티드
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KR1020157002720A 2012-07-23 2013-07-23 다중-메모리 다이를 포함하는 반도체 패키지와 관련된 방법 및 장치 Ceased KR20150040893A (ko)

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US13/947,936 US9117790B2 (en) 2012-06-25 2013-07-22 Methods and arrangements relating to semiconductor packages including multi-memory dies
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Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8674483B2 (en) 2011-06-27 2014-03-18 Marvell World Trade Ltd. Methods and arrangements relating to semiconductor packages including multi-memory dies
US9497861B2 (en) * 2012-12-06 2016-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for package with interposers
US9589927B2 (en) 2014-09-19 2017-03-07 Nxp Usa, Inc. Packaged RF amplifier devices with grounded isolation structures and methods of manufacture thereof
US9337774B2 (en) 2014-09-19 2016-05-10 Freescale Semiconductor, Inc. Packaged RF amplifier devices and methods of manufacture thereof
US11178818B2 (en) 2018-10-26 2021-11-23 Deere & Company Harvesting machine control system with fill level processing based on yield data
US11653588B2 (en) 2018-10-26 2023-05-23 Deere & Company Yield map generation and control system
US11240961B2 (en) 2018-10-26 2022-02-08 Deere & Company Controlling a harvesting machine based on a geo-spatial representation indicating where the harvesting machine is likely to reach capacity
US11079725B2 (en) 2019-04-10 2021-08-03 Deere & Company Machine control using real-time model
US11467605B2 (en) 2019-04-10 2022-10-11 Deere & Company Zonal machine control
US11589509B2 (en) 2018-10-26 2023-02-28 Deere & Company Predictive machine characteristic map generation and control system
US11672203B2 (en) 2018-10-26 2023-06-13 Deere & Company Predictive map generation and control
US11641800B2 (en) 2020-02-06 2023-05-09 Deere & Company Agricultural harvesting machine with pre-emergence weed detection and mitigation system
US11957072B2 (en) 2020-02-06 2024-04-16 Deere & Company Pre-emergence weed detection and mitigation system
US11024617B2 (en) * 2018-10-26 2021-06-01 Micron Technology, Inc. Semiconductor packages having photon integrated circuit (PIC) chips
US10928585B2 (en) 2018-10-26 2021-02-23 Micron Technology, Inc. Semiconductor devices having electro-optical substrates
US12069978B2 (en) 2018-10-26 2024-08-27 Deere & Company Predictive environmental characteristic map generation and control system
US11778945B2 (en) 2019-04-10 2023-10-10 Deere & Company Machine control using real-time model
US11234366B2 (en) 2019-04-10 2022-02-01 Deere & Company Image selection for machine control
US12329148B2 (en) 2020-02-06 2025-06-17 Deere & Company Predictive weed map and material application machine control
US12035648B2 (en) 2020-02-06 2024-07-16 Deere & Company Predictive weed map generation and control system
US12225846B2 (en) 2020-02-06 2025-02-18 Deere & Company Machine control using a predictive map
US11477940B2 (en) 2020-03-26 2022-10-25 Deere & Company Mobile work machine control based on zone parameter modification
US11410949B2 (en) * 2020-07-27 2022-08-09 Micron Technology, Inc. Memory devices with backside bond pads under a memory array
US11946747B2 (en) 2020-10-09 2024-04-02 Deere & Company Crop constituent map generation and control system
US11711995B2 (en) 2020-10-09 2023-08-01 Deere & Company Machine control using a predictive map
US11983009B2 (en) 2020-10-09 2024-05-14 Deere & Company Map generation and control system
US11849672B2 (en) 2020-10-09 2023-12-26 Deere & Company Machine control using a predictive map
US11635765B2 (en) 2020-10-09 2023-04-25 Deere & Company Crop state map generation and control system
US11727680B2 (en) 2020-10-09 2023-08-15 Deere & Company Predictive map generation based on seeding characteristics and control
US11871697B2 (en) 2020-10-09 2024-01-16 Deere & Company Crop moisture map generation and control system
US11650587B2 (en) 2020-10-09 2023-05-16 Deere & Company Predictive power map generation and control system
US12069986B2 (en) 2020-10-09 2024-08-27 Deere & Company Map generation and control system
US11845449B2 (en) 2020-10-09 2023-12-19 Deere & Company Map generation and control system
US11927459B2 (en) 2020-10-09 2024-03-12 Deere & Company Machine control using a predictive map
US12422847B2 (en) 2020-10-09 2025-09-23 Deere & Company Predictive agricultural model and map generation
US11849671B2 (en) 2020-10-09 2023-12-26 Deere & Company Crop state map generation and control system
US11592822B2 (en) 2020-10-09 2023-02-28 Deere & Company Machine control using a predictive map
US11844311B2 (en) 2020-10-09 2023-12-19 Deere & Company Machine control using a predictive map
US11474523B2 (en) 2020-10-09 2022-10-18 Deere & Company Machine control using a predictive speed map
US12013245B2 (en) 2020-10-09 2024-06-18 Deere & Company Predictive map generation and control system
US11825768B2 (en) 2020-10-09 2023-11-28 Deere & Company Machine control using a predictive map
US11874669B2 (en) 2020-10-09 2024-01-16 Deere & Company Map generation and control system
US11895948B2 (en) 2020-10-09 2024-02-13 Deere & Company Predictive map generation and control based on soil properties
US12419220B2 (en) 2020-10-09 2025-09-23 Deere & Company Predictive map generation and control system
US11889788B2 (en) 2020-10-09 2024-02-06 Deere & Company Predictive biomass map generation and control
US12178158B2 (en) 2020-10-09 2024-12-31 Deere & Company Predictive map generation and control system for an agricultural work machine
US12386354B2 (en) 2020-10-09 2025-08-12 Deere & Company Predictive power map generation and control system
US11864483B2 (en) 2020-10-09 2024-01-09 Deere & Company Predictive map generation and control system
US11675354B2 (en) 2020-10-09 2023-06-13 Deere & Company Machine control using a predictive map
US12250905B2 (en) 2020-10-09 2025-03-18 Deere & Company Machine control using a predictive map
US11889787B2 (en) 2020-10-09 2024-02-06 Deere & Company Predictive speed map generation and control system
US12127500B2 (en) 2021-01-27 2024-10-29 Deere & Company Machine control using a map with regime zones
CN117044424A (zh) * 2021-04-08 2023-11-10 超极存储器股份有限公司 模块及其制造方法
US12229886B2 (en) 2021-10-01 2025-02-18 Deere & Company Historical crop state model, predictive crop state map generation and control system
US12310286B2 (en) 2021-12-14 2025-05-27 Deere & Company Crop constituent sensing
US12302791B2 (en) 2021-12-20 2025-05-20 Deere & Company Crop constituents, predictive mapping, and agricultural harvester control
US12245549B2 (en) 2022-01-11 2025-03-11 Deere & Company Predictive response map generation and control system
US12082531B2 (en) 2022-01-26 2024-09-10 Deere & Company Systems and methods for predicting material dynamics
CN114242669B (zh) * 2022-02-28 2022-07-08 甬矽电子(宁波)股份有限公司 堆叠封装结构和堆叠结构封装方法
US12295288B2 (en) 2022-04-05 2025-05-13 Deere &Company Predictive machine setting map generation and control system
US12284934B2 (en) 2022-04-08 2025-04-29 Deere & Company Systems and methods for predictive tractive characteristics and control
US12058951B2 (en) 2022-04-08 2024-08-13 Deere & Company Predictive nutrient map and control
US12358493B2 (en) 2022-04-08 2025-07-15 Deere & Company Systems and methods for predictive power requirements and control
US12298767B2 (en) 2022-04-08 2025-05-13 Deere & Company Predictive material consumption map and control

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235264A (ja) * 1988-03-15 1989-09-20 Toshiba Corp 半導体集積回路装置
JP2001257307A (ja) * 2000-03-09 2001-09-21 Sharp Corp 半導体装置
US6638789B1 (en) * 2000-09-26 2003-10-28 Amkor Technology, Inc. Micromachine stacked wirebonded package fabrication method
WO2002082540A1 (en) * 2001-03-30 2002-10-17 Fujitsu Limited Semiconductor device, method of manufacture thereof, and semiconductor substrate
KR100868419B1 (ko) 2001-06-07 2008-11-11 가부시끼가이샤 르네사스 테크놀로지 반도체장치 및 그 제조방법
JP2003023135A (ja) * 2001-07-06 2003-01-24 Sharp Corp 半導体集積回路装置
JP2003023138A (ja) 2001-07-10 2003-01-24 Toshiba Corp メモリチップ及びこれを用いたcocデバイス、並びに、これらの製造方法
US6476506B1 (en) * 2001-09-28 2002-11-05 Motorola, Inc. Packaged semiconductor with multiple rows of bond pads and method therefor
TW588446B (en) * 2003-03-21 2004-05-21 Advanced Semiconductor Eng Multi-chips stacked package
US7095103B1 (en) * 2003-05-01 2006-08-22 Amkor Technology, Inc. Leadframe based memory card
KR100621547B1 (ko) * 2004-01-13 2006-09-14 삼성전자주식회사 멀티칩 패키지
JP2005317830A (ja) * 2004-04-30 2005-11-10 Elpida Memory Inc 半導体装置、マルチチップパッケージ、およびワイヤボンディング方法
US20080087999A1 (en) * 2006-10-16 2008-04-17 Powertech Technology Inc. Micro BGA package having multi-chip stack
US7560304B2 (en) * 2006-12-28 2009-07-14 Sandisk Corporation Method of making a semiconductor device having multiple die redistribution layer
JP5131812B2 (ja) * 2007-02-07 2013-01-30 ルネサスエレクトロニクス株式会社 半導体装置
KR101185886B1 (ko) * 2007-07-23 2012-09-25 삼성전자주식회사 유니버설 배선 라인들을 포함하는 반도체 칩, 반도체패키지, 카드 및 시스템
US8704379B2 (en) * 2007-09-10 2014-04-22 Invensas Corporation Semiconductor die mount by conformal die coating
US7872483B2 (en) * 2007-12-12 2011-01-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US20090302483A1 (en) * 2008-06-04 2009-12-10 Himax Technologies Limited Stacked die package
CN101404279A (zh) * 2008-11-11 2009-04-08 华亚微电子(上海)有限公司 一种多芯片3d堆叠封装结构
KR20110041301A (ko) * 2009-10-15 2011-04-21 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
US8421242B2 (en) * 2009-12-31 2013-04-16 Advanced Semiconductor Engineering, Inc. Semiconductor package
US8674483B2 (en) * 2011-06-27 2014-03-18 Marvell World Trade Ltd. Methods and arrangements relating to semiconductor packages including multi-memory dies
TWI565026B (zh) * 2012-01-05 2017-01-01 威盛電子股份有限公司 晶片封裝結構

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