JP2015527736A - マルチメモリダイを含む半導体パッケージに関連する方法及び配置 - Google Patents

マルチメモリダイを含む半導体パッケージに関連する方法及び配置 Download PDF

Info

Publication number
JP2015527736A
JP2015527736A JP2015524392A JP2015524392A JP2015527736A JP 2015527736 A JP2015527736 A JP 2015527736A JP 2015524392 A JP2015524392 A JP 2015524392A JP 2015524392 A JP2015524392 A JP 2015524392A JP 2015527736 A JP2015527736 A JP 2015527736A
Authority
JP
Japan
Prior art keywords
die
substrate
memory
memory die
mounting apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015524392A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015527736A5 (enExample
Inventor
スタージャ、セハト
Original Assignee
マーベル ワールド トレード リミテッド
マーベル ワールド トレード リミテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by マーベル ワールド トレード リミテッド, マーベル ワールド トレード リミテッド filed Critical マーベル ワールド トレード リミテッド
Publication of JP2015527736A publication Critical patent/JP2015527736A/ja
Publication of JP2015527736A5 publication Critical patent/JP2015527736A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0652—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/06154—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • H01L2224/06155—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73207—Bump and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06506—Wire or wire-like electrical connections between devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06589—Thermal management, e.g. cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H01L2924/1435—Random access memory [RAM]
    • H01L2924/1436—Dynamic random-access memory [DRAM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Wire Bonding (AREA)
JP2015524392A 2012-07-23 2013-07-23 マルチメモリダイを含む半導体パッケージに関連する方法及び配置 Pending JP2015527736A (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201261674703P 2012-07-23 2012-07-23
US61/674,703 2012-07-23
US201261675626P 2012-07-25 2012-07-25
US61/675,626 2012-07-25
US13/947,936 US9117790B2 (en) 2012-06-25 2013-07-22 Methods and arrangements relating to semiconductor packages including multi-memory dies
US13/947,936 2013-07-22
PCT/US2013/051694 WO2014018538A1 (en) 2012-07-23 2013-07-23 Methods and arrangements relating to semiconductor packages including multi-memory dies

Publications (2)

Publication Number Publication Date
JP2015527736A true JP2015527736A (ja) 2015-09-17
JP2015527736A5 JP2015527736A5 (enExample) 2016-09-15

Family

ID=49945870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015524392A Pending JP2015527736A (ja) 2012-07-23 2013-07-23 マルチメモリダイを含む半導体パッケージに関連する方法及び配置

Country Status (5)

Country Link
US (1) US9117790B2 (enExample)
JP (1) JP2015527736A (enExample)
KR (1) KR20150040893A (enExample)
CN (1) CN104769709A (enExample)
WO (1) WO2014018538A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025003687A (ja) * 2021-04-08 2025-01-09 ウルトラメモリ株式会社 モジュール及びその製造方法

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8674483B2 (en) 2011-06-27 2014-03-18 Marvell World Trade Ltd. Methods and arrangements relating to semiconductor packages including multi-memory dies
US9497861B2 (en) * 2012-12-06 2016-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for package with interposers
US9589927B2 (en) 2014-09-19 2017-03-07 Nxp Usa, Inc. Packaged RF amplifier devices with grounded isolation structures and methods of manufacture thereof
US9337774B2 (en) 2014-09-19 2016-05-10 Freescale Semiconductor, Inc. Packaged RF amplifier devices and methods of manufacture thereof
US11178818B2 (en) 2018-10-26 2021-11-23 Deere & Company Harvesting machine control system with fill level processing based on yield data
US11653588B2 (en) 2018-10-26 2023-05-23 Deere & Company Yield map generation and control system
US11240961B2 (en) 2018-10-26 2022-02-08 Deere & Company Controlling a harvesting machine based on a geo-spatial representation indicating where the harvesting machine is likely to reach capacity
US11079725B2 (en) 2019-04-10 2021-08-03 Deere & Company Machine control using real-time model
US11467605B2 (en) 2019-04-10 2022-10-11 Deere & Company Zonal machine control
US11589509B2 (en) 2018-10-26 2023-02-28 Deere & Company Predictive machine characteristic map generation and control system
US11672203B2 (en) 2018-10-26 2023-06-13 Deere & Company Predictive map generation and control
US11641800B2 (en) 2020-02-06 2023-05-09 Deere & Company Agricultural harvesting machine with pre-emergence weed detection and mitigation system
US11957072B2 (en) 2020-02-06 2024-04-16 Deere & Company Pre-emergence weed detection and mitigation system
US11024617B2 (en) * 2018-10-26 2021-06-01 Micron Technology, Inc. Semiconductor packages having photon integrated circuit (PIC) chips
US10928585B2 (en) 2018-10-26 2021-02-23 Micron Technology, Inc. Semiconductor devices having electro-optical substrates
US12069978B2 (en) 2018-10-26 2024-08-27 Deere & Company Predictive environmental characteristic map generation and control system
US11778945B2 (en) 2019-04-10 2023-10-10 Deere & Company Machine control using real-time model
US11234366B2 (en) 2019-04-10 2022-02-01 Deere & Company Image selection for machine control
US12329148B2 (en) 2020-02-06 2025-06-17 Deere & Company Predictive weed map and material application machine control
US12035648B2 (en) 2020-02-06 2024-07-16 Deere & Company Predictive weed map generation and control system
US12225846B2 (en) 2020-02-06 2025-02-18 Deere & Company Machine control using a predictive map
US11477940B2 (en) 2020-03-26 2022-10-25 Deere & Company Mobile work machine control based on zone parameter modification
US11410949B2 (en) * 2020-07-27 2022-08-09 Micron Technology, Inc. Memory devices with backside bond pads under a memory array
US11946747B2 (en) 2020-10-09 2024-04-02 Deere & Company Crop constituent map generation and control system
US11711995B2 (en) 2020-10-09 2023-08-01 Deere & Company Machine control using a predictive map
US11983009B2 (en) 2020-10-09 2024-05-14 Deere & Company Map generation and control system
US11849672B2 (en) 2020-10-09 2023-12-26 Deere & Company Machine control using a predictive map
US11635765B2 (en) 2020-10-09 2023-04-25 Deere & Company Crop state map generation and control system
US11727680B2 (en) 2020-10-09 2023-08-15 Deere & Company Predictive map generation based on seeding characteristics and control
US11871697B2 (en) 2020-10-09 2024-01-16 Deere & Company Crop moisture map generation and control system
US11650587B2 (en) 2020-10-09 2023-05-16 Deere & Company Predictive power map generation and control system
US12069986B2 (en) 2020-10-09 2024-08-27 Deere & Company Map generation and control system
US11845449B2 (en) 2020-10-09 2023-12-19 Deere & Company Map generation and control system
US11927459B2 (en) 2020-10-09 2024-03-12 Deere & Company Machine control using a predictive map
US12422847B2 (en) 2020-10-09 2025-09-23 Deere & Company Predictive agricultural model and map generation
US11849671B2 (en) 2020-10-09 2023-12-26 Deere & Company Crop state map generation and control system
US11592822B2 (en) 2020-10-09 2023-02-28 Deere & Company Machine control using a predictive map
US11844311B2 (en) 2020-10-09 2023-12-19 Deere & Company Machine control using a predictive map
US11474523B2 (en) 2020-10-09 2022-10-18 Deere & Company Machine control using a predictive speed map
US12013245B2 (en) 2020-10-09 2024-06-18 Deere & Company Predictive map generation and control system
US11825768B2 (en) 2020-10-09 2023-11-28 Deere & Company Machine control using a predictive map
US11874669B2 (en) 2020-10-09 2024-01-16 Deere & Company Map generation and control system
US11895948B2 (en) 2020-10-09 2024-02-13 Deere & Company Predictive map generation and control based on soil properties
US12419220B2 (en) 2020-10-09 2025-09-23 Deere & Company Predictive map generation and control system
US11889788B2 (en) 2020-10-09 2024-02-06 Deere & Company Predictive biomass map generation and control
US12178158B2 (en) 2020-10-09 2024-12-31 Deere & Company Predictive map generation and control system for an agricultural work machine
US12386354B2 (en) 2020-10-09 2025-08-12 Deere & Company Predictive power map generation and control system
US11864483B2 (en) 2020-10-09 2024-01-09 Deere & Company Predictive map generation and control system
US11675354B2 (en) 2020-10-09 2023-06-13 Deere & Company Machine control using a predictive map
US12250905B2 (en) 2020-10-09 2025-03-18 Deere & Company Machine control using a predictive map
US11889787B2 (en) 2020-10-09 2024-02-06 Deere & Company Predictive speed map generation and control system
US12127500B2 (en) 2021-01-27 2024-10-29 Deere & Company Machine control using a map with regime zones
US12229886B2 (en) 2021-10-01 2025-02-18 Deere & Company Historical crop state model, predictive crop state map generation and control system
US12310286B2 (en) 2021-12-14 2025-05-27 Deere & Company Crop constituent sensing
US12302791B2 (en) 2021-12-20 2025-05-20 Deere & Company Crop constituents, predictive mapping, and agricultural harvester control
US12245549B2 (en) 2022-01-11 2025-03-11 Deere & Company Predictive response map generation and control system
US12082531B2 (en) 2022-01-26 2024-09-10 Deere & Company Systems and methods for predicting material dynamics
CN114242669B (zh) * 2022-02-28 2022-07-08 甬矽电子(宁波)股份有限公司 堆叠封装结构和堆叠结构封装方法
US12295288B2 (en) 2022-04-05 2025-05-13 Deere &Company Predictive machine setting map generation and control system
US12284934B2 (en) 2022-04-08 2025-04-29 Deere & Company Systems and methods for predictive tractive characteristics and control
US12058951B2 (en) 2022-04-08 2024-08-13 Deere & Company Predictive nutrient map and control
US12358493B2 (en) 2022-04-08 2025-07-15 Deere & Company Systems and methods for predictive power requirements and control
US12298767B2 (en) 2022-04-08 2025-05-13 Deere & Company Predictive material consumption map and control

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235264A (ja) * 1988-03-15 1989-09-20 Toshiba Corp 半導体集積回路装置
JP2001257307A (ja) * 2000-03-09 2001-09-21 Sharp Corp 半導体装置
WO2002082540A1 (en) * 2001-03-30 2002-10-17 Fujitsu Limited Semiconductor device, method of manufacture thereof, and semiconductor substrate
JP2003023135A (ja) * 2001-07-06 2003-01-24 Sharp Corp 半導体集積回路装置
US20050200003A1 (en) * 2004-01-13 2005-09-15 Ki-Myung Yoon Multi-chip package
JP2005317830A (ja) * 2004-04-30 2005-11-10 Elpida Memory Inc 半導体装置、マルチチップパッケージ、およびワイヤボンディング方法
US7358600B1 (en) * 2003-05-01 2008-04-15 Amkor Technology, Inc. Interposer for interconnecting components in a memory card
JP2008192971A (ja) * 2007-02-07 2008-08-21 Renesas Technology Corp 半導体装置
JP2009027179A (ja) * 2007-07-23 2009-02-05 Samsung Electronics Co Ltd ユニバーサル配線ラインを含む半導体チップ、半導体パッケージ、カード及びシステム
US20090153163A1 (en) * 2007-12-12 2009-06-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
JP2011086943A (ja) * 2009-10-15 2011-04-28 Samsung Electronics Co Ltd 半導体パッケージ並びにこれを用いた電子装置及びメモリ保存装置
CN102543973A (zh) * 2012-01-05 2012-07-04 威盛电子股份有限公司 芯片封装结构

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6638789B1 (en) * 2000-09-26 2003-10-28 Amkor Technology, Inc. Micromachine stacked wirebonded package fabrication method
KR100868419B1 (ko) 2001-06-07 2008-11-11 가부시끼가이샤 르네사스 테크놀로지 반도체장치 및 그 제조방법
JP2003023138A (ja) 2001-07-10 2003-01-24 Toshiba Corp メモリチップ及びこれを用いたｃｏｃデバイス、並びに、これらの製造方法
US6476506B1 (en) * 2001-09-28 2002-11-05 Motorola, Inc. Packaged semiconductor with multiple rows of bond pads and method therefor
TW588446B (en) * 2003-03-21 2004-05-21 Advanced Semiconductor Eng Multi-chips stacked package
US20080087999A1 (en) * 2006-10-16 2008-04-17 Powertech Technology Inc. Micro BGA package having multi-chip stack
US7560304B2 (en) * 2006-12-28 2009-07-14 Sandisk Corporation Method of making a semiconductor device having multiple die redistribution layer
US8704379B2 (en) * 2007-09-10 2014-04-22 Invensas Corporation Semiconductor die mount by conformal die coating
US20090302483A1 (en) * 2008-06-04 2009-12-10 Himax Technologies Limited Stacked die package
CN101404279A (zh) * 2008-11-11 2009-04-08 华亚微电子（上海）有限公司 一种多芯片3d堆叠封装结构
US8421242B2 (en) * 2009-12-31 2013-04-16 Advanced Semiconductor Engineering, Inc. Semiconductor package
US8674483B2 (en) * 2011-06-27 2014-03-18 Marvell World Trade Ltd. Methods and arrangements relating to semiconductor packages including multi-memory dies

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235264A (ja) * 1988-03-15 1989-09-20 Toshiba Corp 半導体集積回路装置
JP2001257307A (ja) * 2000-03-09 2001-09-21 Sharp Corp 半導体装置
WO2002082540A1 (en) * 2001-03-30 2002-10-17 Fujitsu Limited Semiconductor device, method of manufacture thereof, and semiconductor substrate
JP2003023135A (ja) * 2001-07-06 2003-01-24 Sharp Corp 半導体集積回路装置
US7358600B1 (en) * 2003-05-01 2008-04-15 Amkor Technology, Inc. Interposer for interconnecting components in a memory card
US20050200003A1 (en) * 2004-01-13 2005-09-15 Ki-Myung Yoon Multi-chip package
JP2005317830A (ja) * 2004-04-30 2005-11-10 Elpida Memory Inc 半導体装置、マルチチップパッケージ、およびワイヤボンディング方法
JP2008192971A (ja) * 2007-02-07 2008-08-21 Renesas Technology Corp 半導体装置
JP2009027179A (ja) * 2007-07-23 2009-02-05 Samsung Electronics Co Ltd ユニバーサル配線ラインを含む半導体チップ、半導体パッケージ、カード及びシステム
US20090153163A1 (en) * 2007-12-12 2009-06-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
JP2011086943A (ja) * 2009-10-15 2011-04-28 Samsung Electronics Co Ltd 半導体パッケージ並びにこれを用いた電子装置及びメモリ保存装置
CN102543973A (zh) * 2012-01-05 2012-07-04 威盛电子股份有限公司 芯片封装结构

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025003687A (ja) * 2021-04-08 2025-01-09 ウルトラメモリ株式会社 モジュール及びその製造方法

Also Published As

Publication number Publication date
CN104769709A (zh) 2015-07-08
KR20150040893A (ko) 2015-04-15
US20140021598A1 (en) 2014-01-23
US9117790B2 (en) 2015-08-25
WO2014018538A1 (en) 2014-01-30

Similar Documents

Publication Publication Date Title
JP2015527736A (ja) マルチメモリダイを含む半導体パッケージに関連する方法及び配置
US8310063B2 (en) Semiconductor package structure and manufacturing process thereof
TWI616988B (zh) 用於積體電路封裝體之有機－無機混合結構
US11581287B2 (en) Chip scale thin 3D die stacked package
US9653427B2 (en) Integrated circuit package with probe pad structure
JP5993470B2 (ja) スタックされた電子コンポーネントを含む電子アセンブリ
TW202015197A (zh) 半導體封裝
US9123684B2 (en) Chip package structure and manufacturing method thereof
JP2016535462A (ja) ワイヤボンディングされたマルチダイスタックを有する集積回路パッケージ
WO2015184948A1 (zh) 一种芯片堆叠封装结构和电子设备
TWI419270B (zh) 封裝堆疊結構
US9105610B2 (en) Methods and arrangements relating to semiconductor packages including multi-memory dies
KR20150007990A (ko) 복수의 다이를 위한 패키지 어셈블리 구성 및 연관 기법
US20130313727A1 (en) Multi-stacked bbul package
US8288847B2 (en) Dual die semiconductor package
US20170113926A1 (en) Mems chip scale package
JP5522886B2 (ja) コア電源および接地の分配を容易にするための第２基板を有する集積回路
US20160035693A1 (en) Semiconductor tsv device package for circuit board connection
CN105164806A (zh) 层叠封装结构
CN204424248U (zh) 硅通孔结构
CN102332410A (zh) 一种芯片的封装方法及其封装结构
US8466563B2 (en) Apparatus and methods for 3-D stacking of thinned die
US20170047305A1 (en) Packaging arrangements including a serializing dram interface die
US20200043894A1 (en) Thermally-optimized tunable stack in cavity package-on-package
CN111009521A (zh) 多芯片封装模组

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160617

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160728

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170424

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170509

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170721

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20171114

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180209

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20180313

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20200407