KR20090091819A - 실리콘 박막 형성방법 - Google Patents
실리콘 박막 형성방법 Download PDFInfo
- Publication number
- KR20090091819A KR20090091819A KR1020097014968A KR20097014968A KR20090091819A KR 20090091819 A KR20090091819 A KR 20090091819A KR 1020097014968 A KR1020097014968 A KR 1020097014968A KR 20097014968 A KR20097014968 A KR 20097014968A KR 20090091819 A KR20090091819 A KR 20090091819A
- Authority
- KR
- South Korea
- Prior art keywords
- thin film
- silicon thin
- substrate
- plasma
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
- C23C16/0245—Pretreatment of the material to be coated by cleaning or etching by etching with a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2922—Materials being non-crystalline insulating materials, e.g. glass or polymers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Physics & Mathematics (AREA)
- Inorganic Chemistry (AREA)
- Chemical Vapour Deposition (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2007-010476 | 2007-01-19 | ||
| JP2007010476A JP2008177419A (ja) | 2007-01-19 | 2007-01-19 | シリコン薄膜形成方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20090091819A true KR20090091819A (ko) | 2009-08-28 |
Family
ID=39635781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020097014968A Ceased KR20090091819A (ko) | 2007-01-19 | 2007-10-29 | 실리콘 박막 형성방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20100062585A1 (https=) |
| JP (1) | JP2008177419A (https=) |
| KR (1) | KR20090091819A (https=) |
| CN (1) | CN101632153B (https=) |
| WO (1) | WO2008087775A1 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008124111A (ja) * | 2006-11-09 | 2008-05-29 | Nissin Electric Co Ltd | プラズマcvd法によるシリコン系薄膜の形成方法 |
| WO2011080957A1 (ja) | 2009-12-29 | 2011-07-07 | シャープ株式会社 | 薄膜トランジスタ、その製造方法、および表示装置 |
| WO2012029661A1 (ja) * | 2010-09-01 | 2012-03-08 | 株式会社日立国際電気 | 半導体装置の製造方法及び基板処理装置 |
| KR102293862B1 (ko) | 2014-09-15 | 2021-08-25 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
| JP7200880B2 (ja) * | 2019-08-19 | 2023-01-10 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100327086B1 (ko) * | 1994-06-15 | 2002-03-06 | 구사마 사부로 | 박막 반도체 장치의 제조방법, 박막 반도체 장치,액정표시장치 및 전자기기 |
| JPH0851214A (ja) * | 1994-08-05 | 1996-02-20 | Casio Comput Co Ltd | 薄膜トランジスタおよびその製造方法 |
| US5952061A (en) * | 1996-12-27 | 1999-09-14 | Stanley Electric Co., Ltd. | Fabrication and method of producing silicon films |
| TW386249B (en) * | 1997-06-30 | 2000-04-01 | Matsushita Electric Industrial Co Ltd | Method and device for manufacturing semiconductor thin film |
| US20020060322A1 (en) * | 2000-11-20 | 2002-05-23 | Hiroshi Tanabe | Thin film transistor having high mobility and high on-current and method for manufacturing the same |
| JP2002164290A (ja) * | 2000-11-28 | 2002-06-07 | Tokuyama Corp | 多結晶シリコン膜の製造方法 |
| KR100852266B1 (ko) * | 2004-03-26 | 2008-08-14 | 닛신덴키 가부시키 가이샤 | 실리콘막 형성장치 |
| JP4299717B2 (ja) * | 2004-04-14 | 2009-07-22 | Nec液晶テクノロジー株式会社 | 薄膜トランジスタとその製造方法 |
| JP4434115B2 (ja) * | 2005-09-26 | 2010-03-17 | 日新電機株式会社 | 結晶性シリコン薄膜の形成方法及び装置 |
| JP2007123008A (ja) * | 2005-10-27 | 2007-05-17 | Nissin Electric Co Ltd | プラズマ生成方法及び装置並びにプラズマ処理装置 |
| JP5162108B2 (ja) * | 2005-10-28 | 2013-03-13 | 日新電機株式会社 | プラズマ生成方法及び装置並びにプラズマ処理装置 |
| JP2008124111A (ja) * | 2006-11-09 | 2008-05-29 | Nissin Electric Co Ltd | プラズマcvd法によるシリコン系薄膜の形成方法 |
-
2007
- 2007-01-19 JP JP2007010476A patent/JP2008177419A/ja active Pending
- 2007-10-29 WO PCT/JP2007/070995 patent/WO2008087775A1/ja not_active Ceased
- 2007-10-29 US US12/523,709 patent/US20100062585A1/en not_active Abandoned
- 2007-10-29 KR KR1020097014968A patent/KR20090091819A/ko not_active Ceased
- 2007-10-29 CN CN2007800501126A patent/CN101632153B/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20100062585A1 (en) | 2010-03-11 |
| CN101632153B (zh) | 2011-04-13 |
| JP2008177419A (ja) | 2008-07-31 |
| WO2008087775A1 (ja) | 2008-07-24 |
| CN101632153A (zh) | 2010-01-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4488039B2 (ja) | 薄膜半導体装置の製造方法 | |
| CN101558473B (zh) | 利用等离子体cvd法的硅系薄膜的形成方法 | |
| WO1995034916A1 (en) | Manufacture of thin film semiconductor device, thin film semiconductor device, liquid crystal display device, and electronic device | |
| CN101765905B (zh) | 半导体器件的制备方法 | |
| KR20140085407A (ko) | 어모퍼스 실리콘막의 성막 방법 및 성막 장치 | |
| KR20120028247A (ko) | 박막 트랜지스터 | |
| KR100734393B1 (ko) | 실리콘 박막의 원자층 증착 방법 | |
| KR19990068181A (ko) | 성막장치 및 결정성 실리콘막의 형성방법 | |
| CN105189813A (zh) | 在准分子激光退火后具有改善的多晶硅质量的多层非晶硅结构 | |
| KR20090091819A (ko) | 실리콘 박막 형성방법 | |
| KR20180111548A (ko) | 오목부의 매립 방법 및 처리 장치 | |
| KR20040048483A (ko) | 반도체소자의 게이트 산화막 형성방법 | |
| JP4200618B2 (ja) | 半導体膜形成方法及び薄膜半導体装置の製造方法 | |
| JP2001168029A (ja) | 半導体膜形成方法及び薄膜半導体装置の製造方法 | |
| US7521341B2 (en) | Method of direct deposition of polycrystalline silicon | |
| JP2002151693A (ja) | ボトムゲート薄膜トランジスタとその製造方法およびエッチング装置と窒化装置 | |
| JP2000150500A (ja) | シリコン系薄膜の形成方法 | |
| US20070077735A1 (en) | Element of low temperature poly-silicon thin film and method of making poly-silicon thin film by direct deposition at low temperature and inductively-coupled plasma chemical vapor deposition equipment therefor | |
| KR100773123B1 (ko) | 2단계 증착에 의한 다결정 실리콘 박막의 형성 방법 | |
| JP2012238637A (ja) | スパッタリング方法およびスパッタリング装置 | |
| JP2006319306A (ja) | 多結晶質薄膜のインサイチュー成長方法 | |
| WO2011161901A1 (ja) | 多結晶シリコン薄膜の形成方法、多結晶シリコン薄膜基板、シリコン薄膜太陽電池及びシリコン薄膜トランジスタ装置 | |
| JP5199954B2 (ja) | 半導体装置の製造方法 | |
| CN101487114B (zh) | 一种低温多晶硅薄膜器件及其制造方法 | |
| JPH08339965A (ja) | 結晶性半導体膜の形成方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
St.27 status event code: N-2-6-B10-B15-exm-PE0601 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |