JP2008177419A - シリコン薄膜形成方法 - Google Patents

シリコン薄膜形成方法 Download PDF

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Publication number
JP2008177419A
JP2008177419A JP2007010476A JP2007010476A JP2008177419A JP 2008177419 A JP2008177419 A JP 2008177419A JP 2007010476 A JP2007010476 A JP 2007010476A JP 2007010476 A JP2007010476 A JP 2007010476A JP 2008177419 A JP2008177419 A JP 2008177419A
Authority
JP
Japan
Prior art keywords
thin film
silicon thin
forming
substrate
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007010476A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008177419A5 (https=
Inventor
Eiji Takahashi
英治 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP2007010476A priority Critical patent/JP2008177419A/ja
Priority to PCT/JP2007/070995 priority patent/WO2008087775A1/ja
Priority to US12/523,709 priority patent/US20100062585A1/en
Priority to KR1020097014968A priority patent/KR20090091819A/ko
Priority to CN2007800501126A priority patent/CN101632153B/zh
Publication of JP2008177419A publication Critical patent/JP2008177419A/ja
Publication of JP2008177419A5 publication Critical patent/JP2008177419A5/ja
Pending legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
    • C23C16/0245—Pretreatment of the material to be coated by cleaning or etching by etching with a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2922—Materials being non-crystalline insulating materials, e.g. glass or polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Thin Film Transistor (AREA)
JP2007010476A 2007-01-19 2007-01-19 シリコン薄膜形成方法 Pending JP2008177419A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2007010476A JP2008177419A (ja) 2007-01-19 2007-01-19 シリコン薄膜形成方法
PCT/JP2007/070995 WO2008087775A1 (ja) 2007-01-19 2007-10-29 シリコン薄膜形成方法
US12/523,709 US20100062585A1 (en) 2007-01-19 2007-10-29 Method for forming silicon thin film
KR1020097014968A KR20090091819A (ko) 2007-01-19 2007-10-29 실리콘 박막 형성방법
CN2007800501126A CN101632153B (zh) 2007-01-19 2007-10-29 硅薄膜形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007010476A JP2008177419A (ja) 2007-01-19 2007-01-19 シリコン薄膜形成方法

Publications (2)

Publication Number Publication Date
JP2008177419A true JP2008177419A (ja) 2008-07-31
JP2008177419A5 JP2008177419A5 (https=) 2009-07-16

Family

ID=39635781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007010476A Pending JP2008177419A (ja) 2007-01-19 2007-01-19 シリコン薄膜形成方法

Country Status (5)

Country Link
US (1) US20100062585A1 (https=)
JP (1) JP2008177419A (https=)
KR (1) KR20090091819A (https=)
CN (1) CN101632153B (https=)
WO (1) WO2008087775A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8717340B2 (en) 2009-12-29 2014-05-06 Sharp Kabushiki Kaisha Thin film transistor, method for manufacturing same, and display apparatus
US9397196B2 (en) 2014-09-15 2016-07-19 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices that include performing hydrogen plasma treatment on insulating layer

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008124111A (ja) * 2006-11-09 2008-05-29 Nissin Electric Co Ltd プラズマｃｖｄ法によるシリコン系薄膜の形成方法
WO2012029661A1 (ja) * 2010-09-01 2012-03-08 株式会社日立国際電気 半導体装置の製造方法及び基板処理装置
JP7200880B2 (ja) * 2019-08-19 2023-01-10 東京エレクトロン株式会社 成膜方法及び成膜装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995034916A1 (en) * 1994-06-15 1995-12-21 Seiko Epson Corporation Manufacture of thin film semiconductor device, thin film semiconductor device, liquid crystal display device, and electronic device
JPH0851214A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JP2002164290A (ja) * 2000-11-28 2002-06-07 Tokuyama Corp 多結晶シリコン膜の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5952061A (en) * 1996-12-27 1999-09-14 Stanley Electric Co., Ltd. Fabrication and method of producing silicon films
TW386249B (en) * 1997-06-30 2000-04-01 Matsushita Electric Industrial Co Ltd Method and device for manufacturing semiconductor thin film
US20020060322A1 (en) * 2000-11-20 2002-05-23 Hiroshi Tanabe Thin film transistor having high mobility and high on-current and method for manufacturing the same
KR100852266B1 (ko) * 2004-03-26 2008-08-14 닛신덴키 가부시키 가이샤 실리콘막 형성장치
JP4299717B2 (ja) * 2004-04-14 2009-07-22 Ｎｅｃ液晶テクノロジー株式会社 薄膜トランジスタとその製造方法
JP4434115B2 (ja) * 2005-09-26 2010-03-17 日新電機株式会社 結晶性シリコン薄膜の形成方法及び装置
JP2007123008A (ja) * 2005-10-27 2007-05-17 Nissin Electric Co Ltd プラズマ生成方法及び装置並びにプラズマ処理装置
JP5162108B2 (ja) * 2005-10-28 2013-03-13 日新電機株式会社 プラズマ生成方法及び装置並びにプラズマ処理装置
JP2008124111A (ja) * 2006-11-09 2008-05-29 Nissin Electric Co Ltd プラズマｃｖｄ法によるシリコン系薄膜の形成方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995034916A1 (en) * 1994-06-15 1995-12-21 Seiko Epson Corporation Manufacture of thin film semiconductor device, thin film semiconductor device, liquid crystal display device, and electronic device
JPH0851214A (ja) * 1994-08-05 1996-02-20 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
JP2002164290A (ja) * 2000-11-28 2002-06-07 Tokuyama Corp 多結晶シリコン膜の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8717340B2 (en) 2009-12-29 2014-05-06 Sharp Kabushiki Kaisha Thin film transistor, method for manufacturing same, and display apparatus
US9397196B2 (en) 2014-09-15 2016-07-19 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices that include performing hydrogen plasma treatment on insulating layer

Also Published As

Publication number Publication date
US20100062585A1 (en) 2010-03-11
CN101632153B (zh) 2011-04-13
KR20090091819A (ko) 2009-08-28
WO2008087775A1 (ja) 2008-07-24
CN101632153A (zh) 2010-01-20

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