KR20090071681A - 반도체 패키지 몰딩용 금형 및 이를 이용한 몰딩 방법 - Google Patents
반도체 패키지 몰딩용 금형 및 이를 이용한 몰딩 방법 Download PDFInfo
- Publication number
- KR20090071681A KR20090071681A KR1020070139547A KR20070139547A KR20090071681A KR 20090071681 A KR20090071681 A KR 20090071681A KR 1020070139547 A KR1020070139547 A KR 1020070139547A KR 20070139547 A KR20070139547 A KR 20070139547A KR 20090071681 A KR20090071681 A KR 20090071681A
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- South Korea
- Prior art keywords
- resin
- molding
- substrate
- discharge gate
- semiconductor chip
- Prior art date
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- 238000000465 moulding Methods 0.000 title claims abstract description 95
- 239000004065 semiconductor Substances 0.000 title claims abstract description 84
- 238000000034 method Methods 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 239000011347 resin Substances 0.000 claims abstract description 98
- 229920005989 resin Polymers 0.000 claims abstract description 98
- 239000000758 substrate Substances 0.000 claims abstract description 57
- 239000011800 void material Substances 0.000 claims abstract description 12
- 150000001875 compounds Chemical class 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (4)
- 반도체 칩과 기판간의 전기적 신호 연결이 플립 칩으로 이루어진 반도체 패키지 제조용 몰딩 금형에 있어서,상기 몰딩 금형의 수지 공급게이트가 위치된 곳에서 그 반대쪽 위치에 수지 배출게이트를 관통 형성하고, 이 배출게이트의 출구에 수지의 최종 충진 공간이 되는 필름층을 부착한 것을 특징으로 하는 반도체 패키지 몰딩용 금형.
- 청구항 1에 있어서,상기 필름층의 수지 충진용 공간의 두께는 상기 반도체 칩과 기판의 사이 공간 두께와 유사한 것을 특징으로 하는 반도체 패키지 몰딩용 금형.
- 수지 공급게이트가 위치된 곳에서 그 반대쪽 위치에 수지 배출게이트가 관통 형성되고, 이 배출게이트의 출구에 충진 공간을 갖는 필름층이 부착된 몰딩 금형의 제공 단계와;플립 칩에 의하여 반도체 칩과 전기적 신호 연결된 기판을 상기 몰딩 금형에 탑재시키는 단계와;상기 몰딩 금형의 수지 공급게이트를 통하여 몰딩 컴파운드 수지를 주입 공 급하여, 상기 반도체 칩과 플립 칩을 포함하는 기판상의 몰딩영역에 수지가 채워지는 몰딩 단계와;상기 기판상의 몰딩영역을 몰딩시킨 후, 수지가 몰딩 금형의 배출게이트를 통하여 계속 흐르는 동시에 상기 배출게이트를 빠져나온 수지가 상기 필름층의 내부까지 흘러가서 충진되는 보이드 제거 단계;를 포함하는 것을 특징으로 하는 반도체 패키지 몰딩용 금형을 이용한 몰딩 방법.
- 청구항 3에 있어서,상기 몰딩 단계에서, 상기 플립 칩이 존재하는 반도체 칩과 기판의 사이 공간을 빠져나온 수지의 선단부 흐름과, 상기 반도체 칩과 기판의 사이 공간에 계속 존재하는 수지의 후단부 흐름간의 속도 차이로 인하여, 수지의 흐름이 끊겨 보이드가 발생되고;상기 보이드 제거 단계에서, 상기 수지의 선단부 흐름이 상기 배출게이트 및 필름층내로 계속 흘러가 충진되는 동시에 상기 수지의 후단부 흐름이 배출게이트쪽으로 진행되어 상기 보이드 발생 부위가 수지로 채워져 보이드가 제거되는 것을 특징으로 하는 반도체 패키지 몰딩용 금형을 이용한 몰딩 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020070139547A KR100963151B1 (ko) | 2007-12-28 | 2007-12-28 | 반도체 패키지 몰딩용 금형 및 이를 이용한 몰딩 방법 |
Applications Claiming Priority (1)
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KR1020070139547A KR100963151B1 (ko) | 2007-12-28 | 2007-12-28 | 반도체 패키지 몰딩용 금형 및 이를 이용한 몰딩 방법 |
Publications (2)
Publication Number | Publication Date |
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KR20090071681A true KR20090071681A (ko) | 2009-07-02 |
KR100963151B1 KR100963151B1 (ko) | 2010-06-15 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101403924B1 (ko) * | 2012-12-20 | 2014-06-12 | 쏠라퓨전 주식회사 | 태양전지모듈 및 그 제작방법 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101111430B1 (ko) | 2010-07-30 | 2012-02-15 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 제조용 몰드 및 이를 이용한 반도체 패키지 몰딩 방법 |
KR101902996B1 (ko) | 2012-07-09 | 2018-10-01 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
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KR19990002590U (ko) * | 1997-06-27 | 1999-01-25 | 김영환 | 패키지용 금형 |
JP4630449B2 (ja) * | 2000-11-16 | 2011-02-09 | Towa株式会社 | 半導体装置及びその製造方法 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101403924B1 (ko) * | 2012-12-20 | 2014-06-12 | 쏠라퓨전 주식회사 | 태양전지모듈 및 그 제작방법 |
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