JP3648238B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP3648238B2 JP3648238B2 JP2003306721A JP2003306721A JP3648238B2 JP 3648238 B2 JP3648238 B2 JP 3648238B2 JP 2003306721 A JP2003306721 A JP 2003306721A JP 2003306721 A JP2003306721 A JP 2003306721A JP 3648238 B2 JP3648238 B2 JP 3648238B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
例えば,前記第1の半導体チップは,フリップチップ接続により前記基板の表面に搭載される。
また例えば,前記第2の半導体チップは,フリップチップ接続により前記基板の裏面に搭載される。
また例えば,前記基板の表面側あるいは裏面側のうち,前記樹脂の供給を行う側とは異なる側に配置された半導体チップの周囲近傍を横漏れ防止治具にて閉塞した状態で,前記樹脂を供給する。
また例えば,前記樹脂を供給する工程において,前記基板の表面側あるいは裏面側のうち,前記樹脂の供給を行う側とは異なる側に配置された半導体チップの周囲近傍に温風を吹き付ける。
また例えば,前記樹脂を供給する工程は,半導体装置をマザーボード上に電気的に接続した後に行う。
この半導体装置において,前記基板の表裏面の間で封止樹脂を通過させる貫通孔が,前記基板に設けられていることが好ましい。そうすれば,基板の表裏面のいずれか一方側において樹脂を供給して,基板に設けられた貫通孔に該樹脂を通過させることにより,基板表面と第1の半導体チップの間及び基板裏面と第2の半導体チップの間を同時に樹脂で封止することができるようになる。
また,前記基板表面に対する前記第1の半導体チップの電気的な接続及び/又は前記基板裏面に対する前記第2の半導体チップの電気的な接続が,フリップチップ接続であることが好ましい。そうすれば,半導体装置全体の厚さを薄くできるようになる。
この製造方法において,前記基板表面に対する前記第1の半導体チップの電気的な接続や前記基板裏面に対する前記第2の半導体チップの電気的な接続を,フリップチップ接続で行うことが好ましい。そうすれば,半導体装置全体の厚さを薄くできるようになる。
また,前記基板の表裏面のいずれか一方側において樹脂を供給して,基板に設けられた貫通孔に該樹脂を通過させることにより,基板表面と第1の半導体チップの間及び基板裏面と第2の半導体チップの間を同時に樹脂で封止することが好ましい。そうすれば,製造時間短縮とコストダウンがはかれるようになる。この場合,前記樹脂の供給を行わない基板の表面又は裏面において第1の半導体チップの周囲近傍又は第2の半導体チップの周囲近傍を閉塞するための横漏れ防止治具を用いることにより,基板表面と第1の半導体チップの間からの樹脂の漏出又は基板裏面と第2の半導体チップの間からの樹脂の漏出を防ぐことが好ましい。また,前記横漏れ防止治具は,第1の半導体チップの周囲近傍又は第2の半導体チップの周囲近傍に温風を吹き付けることにより樹脂を硬化させるようにしても良い。
また,前記基板裏面と第2の半導体チップの間を樹脂で封止する工程を,半導体装置をマザーボード上に電気的に接続した後に行うようにしても良い。そうすれば,半導体装置の樹脂封止と,半導体装置とマザーボードとの間の樹脂により押さえ込みが同時にでき,封止工程を短縮できる。
10 内部基板
11 第1の半導体チップ
13,19 樹脂
15 バンプ
16 バンプの無い領域
17 第2の半導体チップ
Claims (6)
- 基板の表面に第1の半導体チップを搭載し,前記基板の裏面に第2の半導体チップを搭載する工程と,
前記基板の表面側あるいは裏面側のいずれか一方側から樹脂を供給して,前記基板における前記第1の半導体チップと前記第2の半導体チップの間に位置して設けられた貫通孔に樹脂を通過させることにより,前記基板の表面と前記第1の半導体チップとの間及び前記基板の裏面と前記第2の半導体チップとの間を樹脂で封止する工程と,を含むことを特徴とする,半導体装置の製造方法。 - 前記第1の半導体チップは,フリップチップ接続により前記基板の表面に搭載されることを特徴とする,請求項1に記載の半導体装置の製造方法。
- 前記第2の半導体チップは,フリップチップ接続により前記基板の裏面に搭載されることを特徴とする,請求項1又は2に記載の半導体装置の製造方法。
- 前記基板の表面側あるいは裏面側のうち,前記樹脂の供給を行う側とは異なる側に配置された半導体チップの周囲近傍を横漏れ防止治具にて閉塞した状態で,前記樹脂を供給することを特徴とする,請求項1,2または3に記載の半導体装置の製造方法。
- 前記樹脂を供給する工程において,前記基板の表面側あるいは裏面側のうち,前記樹脂の供給を行う側とは異なる側に配置された半導体チップの周囲近傍に温風を吹き付けることを特徴とする,請求項1,2または3に記載の半導体装置の製造方法。
- 前記樹脂を供給する工程は,半導体装置をマザーボード上に電気的に接続した後に行うことを特徴とする,請求項1,2または3に記載の半導体装置の製造方法。
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JP2003306721A JP3648238B2 (ja) | 2003-08-29 | 2003-08-29 | 半導体装置の製造方法 |
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JP2003306721A JP3648238B2 (ja) | 2003-08-29 | 2003-08-29 | 半導体装置の製造方法 |
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JP12130598A Division JP3648053B2 (ja) | 1998-04-30 | 1998-04-30 | 半導体装置 |
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JP2004015068A JP2004015068A (ja) | 2004-01-15 |
JP3648238B2 true JP3648238B2 (ja) | 2005-05-18 |
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JP2003306721A Expired - Fee Related JP3648238B2 (ja) | 2003-08-29 | 2003-08-29 | 半導体装置の製造方法 |
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JP4557757B2 (ja) | 2005-03-14 | 2010-10-06 | 株式会社東芝 | 半導体装置 |
US7638885B2 (en) * | 2007-04-18 | 2009-12-29 | Korea Advanced Institute Of Science & Technology | Fabric type semiconductor device package and methods of installing and manufacturing same |
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