JP4557757B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4557757B2 JP4557757B2 JP2005070316A JP2005070316A JP4557757B2 JP 4557757 B2 JP4557757 B2 JP 4557757B2 JP 2005070316 A JP2005070316 A JP 2005070316A JP 2005070316 A JP2005070316 A JP 2005070316A JP 4557757 B2 JP4557757 B2 JP 4557757B2
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- Prior art keywords
- semiconductor
- chip
- semiconductor device
- organic material
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 239000004065 semiconductor Substances 0.000 title claims description 111
- 239000000758 substrate Substances 0.000 claims description 32
- 229910000679 solder Inorganic materials 0.000 claims description 27
- 239000011368 organic material Substances 0.000 claims description 23
- 229920005989 resin Polymers 0.000 claims description 17
- 239000011347 resin Substances 0.000 claims description 17
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 239000000463 material Substances 0.000 description 4
- 239000006071 cream Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
Description
Claims (4)
- 有機材料系基板と、
前記有機材料系基板の一方の面の中央にフリップチップ接続された半導体チップと、
前記有機材料系基板と前記半導体チップとの間に設けられた第1の樹脂と、
前記有機材料系基板の他方の面上でその全体が樹脂封止されることなく、前記フリップチップされた半導体チップに対向する位置を避けて該他方の面上に実装された、BGA、LGA、またはQFPの半導体パッケージと、
前記有機材料系基板の前記一方の面の、前記半導体チップが位置する領域の周縁領域に設けられた外部接続端子と
を具備することを特徴とする半導体装置。 - 前記半導体パッケージが、複数であることを特徴とする請求項1記載の半導体装置。
- 前記有機材料系基板と前記半導体パッケージとの間に設けられた第2の樹脂をさらに具備することを特徴とする請求項1記載の半導体装置。
- 前記半導体パッケージが、はんだボールを介して前記有機材料系基板の前記他方の面上に実装されていることを特徴とする請求項1記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005070316A JP4557757B2 (ja) | 2005-03-14 | 2005-03-14 | 半導体装置 |
US11/373,142 US7397132B2 (en) | 2005-03-14 | 2006-03-13 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005070316A JP4557757B2 (ja) | 2005-03-14 | 2005-03-14 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006253519A JP2006253519A (ja) | 2006-09-21 |
JP4557757B2 true JP4557757B2 (ja) | 2010-10-06 |
Family
ID=36969975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005070316A Expired - Fee Related JP4557757B2 (ja) | 2005-03-14 | 2005-03-14 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7397132B2 (ja) |
JP (1) | JP4557757B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108573727A (zh) * | 2017-03-10 | 2018-09-25 | 东芝存储器株式会社 | 半导体存储装置及其控制方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7545031B2 (en) * | 2005-04-11 | 2009-06-09 | Stats Chippac Ltd. | Multipackage module having stacked packages with asymmetrically arranged die and molding |
US20080093726A1 (en) | 2006-10-23 | 2008-04-24 | Francesco Preda | Continuously Referencing Signals over Multiple Layers in Laminate Packages |
US8063475B2 (en) * | 2008-09-26 | 2011-11-22 | Stats Chippac Ltd. | Semiconductor package system with through silicon via interposer |
JP2013219170A (ja) * | 2012-04-09 | 2013-10-24 | Yokogawa Electric Corp | 基板装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11154728A (ja) * | 1997-09-16 | 1999-06-08 | Matsushita Electric Ind Co Ltd | 半導体装置およびその実装体 |
JP2002252322A (ja) * | 2001-02-21 | 2002-09-06 | Sony Corp | 電子部品実装基板及びその製造方法 |
JP2003298001A (ja) * | 2002-03-29 | 2003-10-17 | Fujitsu Ltd | 電子部品パッケージ |
JP2004015068A (ja) * | 2003-08-29 | 2004-01-15 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1199269C (zh) | 1999-10-01 | 2005-04-27 | 精工爱普生株式会社 | 半导体装置及其制造方法和制造装置 |
JP3798597B2 (ja) | 1999-11-30 | 2006-07-19 | 富士通株式会社 | 半導体装置 |
JP2001203318A (ja) * | 1999-12-17 | 2001-07-27 | Texas Instr Inc <Ti> | 複数のフリップチップを備えた半導体アセンブリ |
US6674172B2 (en) * | 2001-05-08 | 2004-01-06 | International Business Machines Corporation | Flip-chip package with underfill having low density filler |
JP2004023045A (ja) | 2002-06-20 | 2004-01-22 | Matsushita Electric Ind Co Ltd | 両面実装方法およびチップ実装基板 |
US6803303B1 (en) * | 2002-07-11 | 2004-10-12 | Micron Technology, Inc. | Method of fabricating semiconductor component having encapsulated, bonded, interconnect contacts |
TWI284395B (en) * | 2002-12-30 | 2007-07-21 | Advanced Semiconductor Eng | Thermal enhance MCM package |
-
2005
- 2005-03-14 JP JP2005070316A patent/JP4557757B2/ja not_active Expired - Fee Related
-
2006
- 2006-03-13 US US11/373,142 patent/US7397132B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11154728A (ja) * | 1997-09-16 | 1999-06-08 | Matsushita Electric Ind Co Ltd | 半導体装置およびその実装体 |
JP2002252322A (ja) * | 2001-02-21 | 2002-09-06 | Sony Corp | 電子部品実装基板及びその製造方法 |
JP2003298001A (ja) * | 2002-03-29 | 2003-10-17 | Fujitsu Ltd | 電子部品パッケージ |
JP2004015068A (ja) * | 2003-08-29 | 2004-01-15 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108573727A (zh) * | 2017-03-10 | 2018-09-25 | 东芝存储器株式会社 | 半导体存储装置及其控制方法 |
CN108573727B (zh) * | 2017-03-10 | 2022-03-22 | 铠侠股份有限公司 | 半导体存储装置及其控制方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2006253519A (ja) | 2006-09-21 |
US20060202350A1 (en) | 2006-09-14 |
US7397132B2 (en) | 2008-07-08 |
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