KR20050001268A - 노광 방법 및 이를 이용한 액정 표시 장치용 박막트랜지스터 기판의 제조 방법 - Google Patents
노광 방법 및 이를 이용한 액정 표시 장치용 박막트랜지스터 기판의 제조 방법 Download PDFInfo
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- KR20050001268A KR20050001268A KR1020030042850A KR20030042850A KR20050001268A KR 20050001268 A KR20050001268 A KR 20050001268A KR 1020030042850 A KR1020030042850 A KR 1020030042850A KR 20030042850 A KR20030042850 A KR 20030042850A KR 20050001268 A KR20050001268 A KR 20050001268A
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- gate
- data line
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- pixel electrode
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Classifications
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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Abstract
Description
19" E21(PVA) | 17" EM5(TN) | 비고 | |
취약 계조 | 60g/256g | 40g/256g | |
취약 계조에서 투과율 | 5% | 1% | white 100% 기준 |
│Vd│ | 4.6V | 6.9V | │Vd│=2*Vlc |
1계조 전압 | 8mV/1g | 22.5mV/1g | 취약 계조 기준 |
19" E21 (PVA) | 17" EM5 (TN) | 비고 | |
취약 계조 | 60gray/256gray | 40gray/256gray | |
데이터선-화소 전극 오버레이 1㎛ 쉬프트시 휘도 변화 | 1.6 | 1.17 | 공정 능력 1㎛ → 0.7㎛ 관리 요망 |
Claims (15)
- 소정의 패턴이 형성된 마스크의 상부에서 광을 소정의 방향으로 스캔하는 방식으로 노광하여 기판상에 형성된 층에 상기 패턴을 전사하는 단계를 포함하는 노광 방법에서,상기 광의 스캔 방향과 상기 기판상에 형성된 층을 패터닝하여 형성하고자 하는 패턴의 길이 방향이 수직인 것을 특징으로 하는 노광 방법.
- 제1항에 있어서, 상기 기판상에 형성되는 데이터선상에 절연층을 형성한 후, 도전성 패턴으로서 화소 전극의 형성을 위한 노광 공정의 수행시, 상기 광의 스캔 방향과 상기 데이터선의 길이 방향이 서로 수직인 것을 특징으로 하는 노광 방법.
- 제1항에 있어서, 상기 기판상에 형성되는 데이터선과 화소 전극간의 간격이 적어도 6.25㎛ 인 것을 특징으로 하는 노광 방법.
- 제1항에 있어서, 상기 마스크는 한 번에 하나의 셀을 노광시킬 수 있는 마스크인 것을 특징으로 하는 노광 방법.
- 기판상에 게이트 배선층을 형성하는 단계;상기 게이트 배선층을 식각하여 게이트선, 게이트 끝단 및 게이트 전극을 포함하는 게이트 패턴을 형성하는 단계;게이트 절연막을 적층하는 단계;반도체층 패턴 및 저항성 접촉층 패턴을 형성하는 단계;데이터 배선 물질을 도포하고 상부에 포토레지스트층을 형성하는 단계;마스크를 개재하여 형성하고자 하는 데이터선의 길이 방향과 수직 방향으로 광을 스캐닝하여 상기 포토레지스트층을 노광하는 단계;포토레지스트층을 이용하여 패터닝함으로써 상기 게이트선과 교차하는 데이터선, 상기 데이터선과 연결되어 있는 데이터 끝단, 상기 데이터선과 연결되어 있으며 상기 게이트 전극에 인접하는 소스 전극 및 상기 게이트 전극에 대하여 상기 소스 전극의 맞은 편에 위치하는 드레인 전극을 포함하는 데이터 배선을 형성하는 단계;보호막을 형성하는 단계;상기 게이트 절연막과 함께 상기 보호막을 패터닝하여 상기 게이트 끝단, 상기 데이터 끝단 및 상기 드레인 전극을 각각 드러내는 접촉 구멍을 형성하는 단계;투명 도전막을 적층하는 단계; 및상기 투명 도전막을 식각하여 상기 게이트 끝단, 상기 데이터 끝단 및 상기 드레인 전극과 각각 연결되는 보조 게이트 끝단, 보조 데이터 끝단 및 화소 전극을 형성하는 단계를 포함하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제5항에 있어서, 상기 화소 전극의 형성을 위하여 화소 전극상에 형성되는포토레지스트층의 노광시, 광의 스캐닝 방향은 상기 데이터선과 수직 방향인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제5항에 있어서, 상기 기판상에 형성되는 데이터선과 화소 전극간의 간격이 적어도 6.25㎛ 인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제5항에 있어서, 상기 마스크는 한 번에 하나의 셀을 노광시킬 수 있는 마스크인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제5항에 있어서, 상기 마스크는 한 번에 두 개의 셀을 노광시킬 수 있는 마스크인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 기판상에 게이트 배선층을 형성하는 단계;상기 게이트 배선층을 식각하여 게이트선, 게이트 끝단 및 게이트 전극을 포함하는 게이트 패턴을 형성하는 단계;게이트 절연막을 적층하는 단계;반도체층, 저항성 접촉층, 및 도전체층을 적층하는 단계;제1 부분, 상기 제1 부분보다 두께가 두꺼운 제2 부분, 상기 제1 두께보다 두께가 얇은 제3 부분을 가지는 감광막 패턴을 형성하되, 마스크를 개재하여 노광시 광의 스캐닝 방향과 형성하고자 하는 데이터선의 길이 방향이 수직 방향이 되도록 하여 노광 공정을 수행하는 단계;상기 감광막 패턴을 사용하여 데이터선 및 이와 연결된 데이터 끝단, 소스 전극 및 드레인 전극을 포함하는 데이터 배선, 그리고 저항성 접촉층 패턴 및 반도체층 패턴을 형성하는 단계;보호막을 형성하는 단계;상기 게이트 절연막과 함께 상기 보호막을 패터닝하여 상기 게이트 끝단, 상기 데이터 끝단 및 상기 드레인 전극을 각각 드러내는 접촉 구멍을 형성하는 단계;투명 도전막을 적층하는 단계; 및상기 투명 도전막을 식각하여, 상기 게이트 끝단, 상기 데이터 끝단 및 상기 드레인 전극과 각각 연결되는 보조 게이트 끝단, 보조 데이터 끝단 및 화소 전극을 형성하는 단계를 포함하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제10항에 있어서, 상기 화소 전극의 형성을 위하여 화소 전극상에 형성되는 포토레지스트층의 노광시, 광의 스캐닝 방향은 상기 데이터선과 수직 방향인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제10항에 있어서, 상기 기판상에 형성되는 데이터선과 화소 전극간의 간격이 적어도 6.25㎛ 인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제10항에 있어서, 상기 마스크는 한 번에 하나의 셀을 노광시킬 수 있는 마스크인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제10항에 있어서, 상기 마스크는 한 번에 복수의 셀을 노광시킬 수 있는 마스크인 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
- 제10항에 있어서, 상기 제1 부분은 상기 소스 전극과 상기 드레인 전극 사이에 위치하도록 형성하고, 상기 제2 부분은 상기 데이터 배선 상부에 위치하도록 형성하는 것을 특징으로 하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.
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US10/815,287 US7595207B2 (en) | 2003-06-27 | 2004-04-01 | Method of exposing layer with light and method of manufacturing thin film transistor substrate for liquid crystal display device using the same |
CN2004100327062A CN1577090B (zh) | 2003-06-27 | 2004-04-13 | 曝光方法及利用该曝光方法制造用于液晶显示器的薄膜晶体管基片的方法 |
TW093111924A TWI311338B (en) | 2003-06-27 | 2004-04-28 | Method of exposing layer with light and method of manufacturing thin film transistor substrate for liquid crystal display device using the same |
JP2004187335A JP2005018074A (ja) | 2003-06-27 | 2004-06-25 | 露光方法及びこれを用いる液晶表示装置用薄膜トランジスタ基板の製造方法 |
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KR101146418B1 (ko) * | 2004-11-08 | 2012-05-17 | 엘지디스플레이 주식회사 | 폴리 실리콘형 액정 표시 장치용 어레이 기판 및 그 제조방법 |
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KR20070010868A (ko) * | 2005-07-20 | 2007-01-24 | 삼성전자주식회사 | 박막트랜지스터 기판의 제조방법 |
JP4258532B2 (ja) * | 2006-06-30 | 2009-04-30 | カシオ計算機株式会社 | 薄膜デバイス基板とその製造方法 |
JP5043474B2 (ja) * | 2007-03-01 | 2012-10-10 | 株式会社ジャパンディスプレイイースト | 表示装置 |
WO2011043217A1 (en) * | 2009-10-09 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and electronic device including the same |
CN102253521B (zh) * | 2011-08-08 | 2013-11-06 | 信利半导体有限公司 | 一种液晶显示装置及制造方法 |
CN102709243B (zh) | 2012-05-18 | 2015-04-29 | 京东方科技集团股份有限公司 | 有机发光二极管显示面板及其制造方法 |
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- 2004-04-13 CN CN2004100327062A patent/CN1577090B/zh not_active Expired - Lifetime
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US7595207B2 (en) | 2009-09-29 |
TWI311338B (en) | 2009-06-21 |
KR100947538B1 (ko) | 2010-03-12 |
CN1577090A (zh) | 2005-02-09 |
US20040266039A1 (en) | 2004-12-30 |
TW200509203A (en) | 2005-03-01 |
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