KR20040097276A - 인터리빙을 행하기 위한 방법 및 장치와, 디인터리빙을행하기 위한 방법 및 장치 - Google Patents
인터리빙을 행하기 위한 방법 및 장치와, 디인터리빙을행하기 위한 방법 및 장치 Download PDFInfo
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
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- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
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- H—ELECTRICITY
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- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
- H03M13/2764—Circuits therefore
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
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- H—ELECTRICITY
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
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- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0023—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
- H04L1/0025—Transmission of mode-switching indication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/007—Unequal error protection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0072—Error control for data other than payload data, e.g. control data
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0086—Unequal error protection
- H04L1/0088—Unequal error protection in control part
Abstract
Description
Claims (11)
- 오류정정부호화되어 있지 않은 제1세트의 데이터 및 오류정정부호화되어 있는 제2세트의 데이터를 동일 프레임에 포함시켜 전송 또는 저장하는 방법에 있어서, 상기 제1세트의 데이터에 대응하는 2 이상의 비트를 사이에 끼우도록, 상기 제2세트를 나타내는 비트열을 구성하는 비트는 상기 제1세트의 데이터를 나타내는 비트열 내에 하나 또는 복수의 비트씩 분산 배치되는 것을 특징으로 하는 인터리빙방법.
- 제1항에 있어서, 상기 제2세트의 데이터를 나타내는 비트열을 형성하는 비트들은 상기 제1세트의 데이터를 나타내는 비트열 내에 1비트씩 분산 배치되는 것을 특징으로 하는 인터리빙방법.
- 제1항에 있어서, 상기 제2세트의 데이터를 나타내는 비트열을 형성하는 비트들은 상기 제1세트의 데이터를 나타내는 비트열 내에 복수 비트씩 분산 배치되는 것을 특징으로 하는 인터리빙방법.
- 제1항에 있어서, 상기 제2세트의 데이터가 복수 세트로 이루어지고, 상기 제2세트의 데이터의 세트 수만큼 분산배치가 반복되는 것을 특징으로 하는 인터리빙방법.
- 제4항에 있어서, 상기 제2세트의 데이터는 각 세트별로 상이한 코드 길이로 오류정정부호화된 것을 특징으로 하는 인터리빙방법.
- 제1항에 있어서, 상기 제1세트의 데이터는 전송 과정에서 부호오류가 발생할 겨웅에 은폐처리(concealment processing)의 대상으로 되는 정보인 것을 특징으로 하는 인터리빙방법.
- 제1항에 있어서, 상기 제1세트의 데이터는, 전송 또는 저장하고자 하는 신호를 미분 부호화할 때 얻어지는 미분값을 나타내는 데이터이고, 상기 제2세트의 데이터는 상기 미분 부호화시 얻어지는 초기값 데이터 세트인 것을 특징으로 하는 인터리빙방법.
- (a) 디인터리빙의 대상이 되는 비트열 내에 분산배치된 비트들을 상기 비트열로부터 추출하여 제2세트의 데이터를 나타내는 비트열로 복원하는 단계; 및(b) 상기 복원하는 단계(a)에서 추출되고 남은 비트열로서 이루어진 제1세트의 데이터를 나타내는 비트열을 복원하는 단계를 포함하며,상기 제1세트의 데이터는 오류정정부호화되어 있지 않은 데이터이며, 상기 제2세트의 데이터는 오류정정부호화된 데이터인 것을 특징으로 하는 디인터리빙방법.
- 제8항에 있어서,(c) 상기 제1세트의 데이터를 나타내는 비트열 내에 분산 배치된 비트들을 추출하여 또 다른 제2세트를 나타내는 비트열을 복원하는 단계;(d) 상기 복원하는 단계 (c)에서 추출되고 남은 비트열로서 이루어진 새로운 제1세트의 데이터를 나타내는 비트열을 복원하는 단계를 포함하며,상기 단계 (c) 및 (d)를 반복함으로써, 서로 다른 세트의 데이터를 나타내는 3개 이상의 비트열을 복원하는 것을 특징으로 하는 디인터리빙방법.
- 행렬 구조의 작업 메모리와,전송 또는 저장하고자 하는 프레임에 포함되는 제1세트의 데이터를 나타내는 비트열을 구성하는 각 비트를 상기 작업 메모리의 제1행을 제외한 영역에 기입하기 위한 복수의 기입 어드레스를 상기 작업 메모리의 열마다 상기 작업 메모리에 공급하고, 상기 프레임에 포함된 제2세트의 데이터를 나타내는 비트열을 구성하는 각 비트를 상기 작업 메모리의 제1행에 기입하기 위한 복수의 기입 어드레스를 상기 작업 메모리에 공급하는 기입 어드레스 공급부와,상기 작업 메모리로부터 전송 또는 저장하고자 하는 프레임을 형성하는 비트열을 판독하기 위한 복수의 판독 어드레스를 상기 작업 메모리의 열마다 상기 작업 메모리에 공급하는 판독 어드레스 공급부를 구비하는 것을 특징으로 하는 인터리빙 장치.
- 행렬 구조의 작업 메모리와,디인터리빙의 대상이 되는 비트열을 구성하는 각 비트를 상기 작업 메모리에 기입하기 위한 복수의 기입 어드레스를 상기 작업 메모리의 열마다 상기 작업 메모리에 공급하는 기입 어드레스 공급부와,상기 디인터리빙 대상이 되는 비트열 내에 분산 배치된 제2세트의 데이터를 나타내는 비트열을 구성하는 각 비트를 상기 작업 메모리의 제1행으로부터 판독하기 위한 복수의 판독 어드레스를 상기 작업 메모리에 공급하고, 상기 작업 메모리의 제1행을 제외한 영역으로부터 제1세트의 데이터를 나타내는 비트열을 구성하는 각 비트를 판독하기 위한 복수의 판독 어드레스를 상기 작업 메모리의 열마다 공급하는 판독 어드레스 공급부를 구비하는 것을 특징으로 하는 디인터리빙장치.
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JPJP-P-1998-00146191 | 1998-05-27 | ||
JP14619198 | 1998-05-27 | ||
JP34601698 | 1998-12-04 | ||
JPJP-P-1998-00346016 | 1998-12-04 | ||
PCT/JP1999/002799 WO1999062184A1 (fr) | 1998-05-27 | 1999-05-27 | Procede et dispositif d'intercalage, et procede et dispositif de desintercalage |
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KR10-2000-7000929A Division KR100493261B1 (ko) | 1998-05-27 | 1999-05-27 | 인터리빙을 행하기 위한 방법 및 장치와, 디인터리빙을행하기 위한 방법 및 장치 |
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KR10-2000-7000929A KR100493261B1 (ko) | 1998-05-27 | 1999-05-27 | 인터리빙을 행하기 위한 방법 및 장치와, 디인터리빙을행하기 위한 방법 및 장치 |
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US (4) | US6871302B1 (ko) |
EP (3) | EP1017175B1 (ko) |
JP (1) | JP3362051B2 (ko) |
KR (2) | KR100493263B1 (ko) |
CN (1) | CN1147052C (ko) |
AU (1) | AU742455C (ko) |
CA (1) | CA2297770C (ko) |
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1999
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Also Published As
Publication number | Publication date |
---|---|
CN1147052C (zh) | 2004-04-21 |
CA2297770A1 (en) | 1999-12-02 |
WO1999062184A1 (fr) | 1999-12-02 |
DE69936568D1 (de) | 2007-08-30 |
US7191369B2 (en) | 2007-03-13 |
EP1843474B1 (en) | 2008-12-17 |
US7469365B2 (en) | 2008-12-23 |
DE69936568T2 (de) | 2008-04-30 |
AU742455C (en) | 2003-01-09 |
US20050005223A1 (en) | 2005-01-06 |
US20070038902A1 (en) | 2007-02-15 |
US7428667B2 (en) | 2008-09-23 |
JP3362051B2 (ja) | 2003-01-07 |
CA2297770C (en) | 2007-10-30 |
EP1017175A4 (en) | 2005-11-16 |
KR100493263B1 (ko) | 2005-06-02 |
CN1272978A (zh) | 2000-11-08 |
AU3954499A (en) | 1999-12-13 |
US6871302B1 (en) | 2005-03-22 |
DE69942595D1 (de) | 2010-08-26 |
DE69940134D1 (de) | 2009-01-29 |
EP1843474A1 (en) | 2007-10-10 |
AU742455B2 (en) | 2002-01-03 |
KR100493261B1 (ko) | 2005-06-02 |
EP1841077B1 (en) | 2010-07-14 |
EP1017175B1 (en) | 2007-07-18 |
US20070038903A1 (en) | 2007-02-15 |
EP1841077A1 (en) | 2007-10-03 |
KR20010022350A (ko) | 2001-03-15 |
EP1017175A1 (en) | 2000-07-05 |
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