KR20040048985A - 기판에 상호접속을 갖는 집적회로 및 이를 위한 방법 - Google Patents
기판에 상호접속을 갖는 집적회로 및 이를 위한 방법 Download PDFInfo
- Publication number
- KR20040048985A KR20040048985A KR10-2004-7006013A KR20047006013A KR20040048985A KR 20040048985 A KR20040048985 A KR 20040048985A KR 20047006013 A KR20047006013 A KR 20047006013A KR 20040048985 A KR20040048985 A KR 20040048985A
- Authority
- KR
- South Korea
- Prior art keywords
- conductive
- region
- dielectric
- doped
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/0698—Local interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/986,232 | 2001-10-22 | ||
| US09/986,232 US6555915B1 (en) | 2001-10-22 | 2001-10-22 | Integrated circuit having interconnect to a substrate and method therefor |
| PCT/US2002/030337 WO2003036702A2 (en) | 2001-10-22 | 2002-09-27 | Integrated circuit having interconnect to a substrate and method therefor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20040048985A true KR20040048985A (ko) | 2004-06-10 |
Family
ID=25532216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2004-7006013A Ceased KR20040048985A (ko) | 2001-10-22 | 2002-09-27 | 기판에 상호접속을 갖는 집적회로 및 이를 위한 방법 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6555915B1 (https=) |
| EP (1) | EP1479101A2 (https=) |
| JP (1) | JP2006500759A (https=) |
| KR (1) | KR20040048985A (https=) |
| CN (1) | CN1326210C (https=) |
| AU (1) | AU2002327714A1 (https=) |
| WO (1) | WO2003036702A2 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100825466B1 (ko) * | 2004-08-06 | 2008-04-28 | 오스트리아마이크로시스템즈 아게 | 고전압 nmos 트랜지스터 및 그것의 제조 방법 |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003031801A (ja) * | 2001-07-16 | 2003-01-31 | Oki Electric Ind Co Ltd | 電界効果型トランジスタの製造方法 |
| US20040121524A1 (en) * | 2002-12-20 | 2004-06-24 | Micron Technology, Inc. | Apparatus and method for controlling diffusion |
| US7297617B2 (en) * | 2003-04-22 | 2007-11-20 | Micron Technology, Inc. | Method for controlling diffusion in semiconductor regions |
| US7654221B2 (en) * | 2003-10-06 | 2010-02-02 | Applied Materials, Inc. | Apparatus for electroless deposition of metals onto semiconductor substrates |
| US7297605B2 (en) * | 2004-05-10 | 2007-11-20 | Texas Instruments Incorporated | Source/drain extension implant process for use with short time anneals |
| US7150516B2 (en) * | 2004-09-28 | 2006-12-19 | Hewlett-Packard Development Company, L.P. | Integrated circuit and method for manufacturing |
| KR100657142B1 (ko) * | 2005-06-03 | 2006-12-13 | 매그나칩 반도체 유한회사 | 이미지센서의 픽셀 쉬링크를 위한 콘택 구조 및 그 제조방법 |
| JP6374718B2 (ja) * | 2014-07-14 | 2018-08-15 | 矢崎総業株式会社 | 電気素子 |
| JP6268070B2 (ja) * | 2014-09-16 | 2018-01-24 | 矢崎総業株式会社 | メッキ材及び端子金具 |
| WO2016010053A1 (ja) * | 2014-07-14 | 2016-01-21 | 矢崎総業株式会社 | 電気素子 |
| JP6268055B2 (ja) * | 2014-07-15 | 2018-01-24 | 矢崎総業株式会社 | 端子及びコネクタ |
| JP6272744B2 (ja) * | 2014-10-24 | 2018-01-31 | 矢崎総業株式会社 | 板状導電体及び板状導電体の表面処理方法 |
| US10038081B1 (en) | 2017-09-06 | 2018-07-31 | Nxp Usa, Inc. | Substrate contacts for a transistor |
| US10679987B2 (en) * | 2017-10-31 | 2020-06-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4843034A (en) * | 1987-06-12 | 1989-06-27 | Massachusetts Institute Of Technology | Fabrication of interlayer conductive paths in integrated circuits |
| CA1276314C (en) * | 1988-03-24 | 1990-11-13 | Alexander Kalnitsky | Silicon ion implanted semiconductor device |
| JPH03101255A (ja) * | 1989-09-14 | 1991-04-26 | Sony Corp | 半導体装置 |
| JPH04162519A (ja) * | 1990-10-24 | 1992-06-08 | Sony Corp | Mos型半導体装置の製造方法 |
| US5783469A (en) * | 1996-12-10 | 1998-07-21 | Advanced Micro Devices, Inc. | Method for making nitrogenated gate structure for improved transistor performance |
| US6017829A (en) * | 1997-04-01 | 2000-01-25 | Micron Technology, Inc. | Implanted conductor and methods of making |
| US6074904A (en) * | 1998-04-21 | 2000-06-13 | Advanced Micro Devices, Inc. | Method and structure for isolating semiconductor devices after transistor formation |
| US6027961A (en) * | 1998-06-30 | 2000-02-22 | Motorola, Inc. | CMOS semiconductor devices and method of formation |
| US6077748A (en) * | 1998-10-19 | 2000-06-20 | Advanced Micro Devices, Inc. | Advanced trench isolation fabrication scheme for precision polysilicon gate control |
| KR100281908B1 (ko) * | 1998-11-20 | 2001-02-15 | 김덕중 | 반도체소자 및 그 제조방법 |
| JP3723410B2 (ja) * | 2000-04-13 | 2005-12-07 | 三洋電機株式会社 | 半導体装置とその製造方法 |
-
2001
- 2001-10-22 US US09/986,232 patent/US6555915B1/en not_active Expired - Fee Related
-
2002
- 2002-09-27 AU AU2002327714A patent/AU2002327714A1/en not_active Abandoned
- 2002-09-27 WO PCT/US2002/030337 patent/WO2003036702A2/en not_active Ceased
- 2002-09-27 JP JP2003539091A patent/JP2006500759A/ja active Pending
- 2002-09-27 EP EP02763717A patent/EP1479101A2/en not_active Withdrawn
- 2002-09-27 CN CNB028231287A patent/CN1326210C/zh not_active Expired - Fee Related
- 2002-09-27 KR KR10-2004-7006013A patent/KR20040048985A/ko not_active Ceased
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100825466B1 (ko) * | 2004-08-06 | 2008-04-28 | 오스트리아마이크로시스템즈 아게 | 고전압 nmos 트랜지스터 및 그것의 제조 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006500759A (ja) | 2006-01-05 |
| CN1326210C (zh) | 2007-07-11 |
| CN1592951A (zh) | 2005-03-09 |
| US20030075806A1 (en) | 2003-04-24 |
| WO2003036702A2 (en) | 2003-05-01 |
| EP1479101A2 (en) | 2004-11-24 |
| AU2002327714A1 (en) | 2003-05-06 |
| US6555915B1 (en) | 2003-04-29 |
| WO2003036702A3 (en) | 2003-11-06 |
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| Date | Code | Title | Description |
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| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
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| N231 | Notification of change of applicant | ||
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St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
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| R17-X000 | Change to representative recorded |
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St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| PB0901 | Examination by re-examination before a trial |
St.27 status event code: A-6-3-E10-E12-rex-PB0901 |
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| B601 | Maintenance of original decision after re-examination before a trial | ||
| PB0601 | Maintenance of original decision after re-examination before a trial |
St.27 status event code: N-3-6-B10-B17-rex-PB0601 |
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St.27 status event code: A-3-3-R10-R18-oth-X000 |
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| J301 | Trial decision |
Free format text: TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20090812 Effective date: 20101029 Free format text: TRIAL NUMBER: 2009101007487; TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20090812 Effective date: 20101029 |
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St.27 status event code: A-3-3-V10-V15-crt-PJ1301 Decision date: 20101029 Appeal event data comment text: Appeal Kind Category : Appeal against decision to decline refusal, Appeal Ground Text : 2004 7006013 Appeal request date: 20090812 Appellate body name: Patent Examination Board Decision authority category: Office appeal board Decision identifier: 2009101007487 |
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St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
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