KR20030093986A - 향상된 전류용량을 갖는 다층회로기판 및 그의 제조방법 - Google Patents
향상된 전류용량을 갖는 다층회로기판 및 그의 제조방법 Download PDFInfo
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- KR20030093986A KR20030093986A KR10-2003-0033800A KR20030033800A KR20030093986A KR 20030093986 A KR20030093986 A KR 20030093986A KR 20030033800 A KR20030033800 A KR 20030033800A KR 20030093986 A KR20030093986 A KR 20030093986A
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- conductive
- circuit board
- conductor pattern
- trench
- multilayer circuit
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (9)
- 복수개의 절연층 및 각각 도체패턴을 포함하는 복수개의 도전층이 적층되는 다층회로기판에 있어서,상기 절연층은 트렌치를 구비하고;상기 트렌치내에 도전성 조성물이 위치되며;상기 도체패턴은 상기 트렌치에 인접하고, 상기 도전성 조성물에 전기적으로 접속되되, 상기 도체패턴 및 도전성 조성물은 도체패턴보다 높은 전류용량을 갖는 도전성 배선을 포함하는다층회로기판.
- 제1항에 있어서,상기 트렌치는 상기 절연층을 통해 연장하는다층회로기판.
- 제2항에 있어서,상기 트렌치는 상기 도체패턴의 폭보다 좁은 폭을 갖는다층회로기판.
- 제1항 내지 제3항 중 어느 한 항에 있어서,상기 절연층은 열가소성 수지필름으로 이루어지는다층회로기판.
- 제4항에 있어서,상기 절연층은 10 내지 200㎛의 두께를 가지며, 상기 도체패턴은 5 내지 75㎛의 두께를 갖는다층회로기판.
- 복수개의 절연층 및 각각 도체패턴을 포함하는 복수개의 도전층이 적층되는 다층회로기판을 제조방법에 있어서,상기 절연층에 도체패턴을 형성하는 단계와, 상기 절연층에 트렌치를 형성하는 단계, 및 금속입자를 포함하는 낮은 고유저항 도전성 페이스트를 트렌치에 충전하는 단계를 포함하는 도체패턴필름을 제조하는 단계;상기 도체패턴필름과 절연층을 적층하여 적층체를 형성하는 단계; 및상기 절연층은 서로 접착되고, 상기 도전성 페이스트는 소결되어 상기 도전성 페이스트에 전기적으로 접속되는 도전성 조성물을 형성하며, 상기 도전성 조성물과 도체패턴은 상기 도체패턴보다 높은 전류용량을 갖는 도전성 배선을 형성하도록 상기 적층체를 가열 가압하는 단계를 포함하는 다층회로기판 제조방법.
- 제6항에 있어서,상기 트렌치는 절연층을 통해 연장하도록 형성되고, 상기 도체패턴에 의하여 바닥을 형성하는다층회로기판 제조방법.
- 제7항에 있어서,상기 트렌치는 상기 도체패턴의 폭보다 좁은 폭을 갖도록 형성되는다층회로기판 제조방법.
- 상기 제6항 내지 제8항 중 어느 한 항에 있어서,상기 절연층은 10 내지 200㎛의 두께를 갖도록 형성되고, 상기 도체패턴은 5 내지 75㎛의 두께를 갖도록 형성되는다층회로기판 제조방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002158041A JP3969192B2 (ja) | 2002-05-30 | 2002-05-30 | 多層配線基板の製造方法 |
JPJP-P-2002-00158041 | 2002-05-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030093986A true KR20030093986A (ko) | 2003-12-11 |
KR100534548B1 KR100534548B1 (ko) | 2005-12-07 |
Family
ID=29545532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2003-0033800A KR100534548B1 (ko) | 2002-05-30 | 2003-05-27 | 향상된 전류용량을 갖는 다층회로기판 및 그의 제조방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6848178B2 (ko) |
JP (1) | JP3969192B2 (ko) |
KR (1) | KR100534548B1 (ko) |
CN (1) | CN100346678C (ko) |
DE (1) | DE10323903B4 (ko) |
TW (1) | TWI221759B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100668273B1 (ko) * | 2004-08-20 | 2007-01-12 | 세이코 엡슨 가부시키가이샤 | 다층 구조 형성 방법, 배선 기판 및 전자 기기의 제조 방법 |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060042832A1 (en) * | 2004-08-27 | 2006-03-02 | Kiyoshi Sato | Multilayer circuit board and method of producing the same |
TW200618705A (en) | 2004-09-16 | 2006-06-01 | Tdk Corp | Multilayer substrate and manufacturing method thereof |
US7176781B2 (en) * | 2004-09-29 | 2007-02-13 | Agere Systems Inc | Structure and method for adjusting integrated circuit resistor value |
KR100633062B1 (ko) * | 2004-10-07 | 2006-10-11 | 삼성전자주식회사 | 6층 인쇄회로기판 |
TWI287805B (en) * | 2005-11-11 | 2007-10-01 | Ind Tech Res Inst | Composite conductive film and semiconductor package using such film |
US7271700B2 (en) * | 2005-02-16 | 2007-09-18 | International Business Machines Corporation | Thin film resistor with current density enhancing layer (CDEL) |
US7340825B2 (en) * | 2006-07-06 | 2008-03-11 | Harris Corporation | Method of making a transformer |
US8440916B2 (en) | 2007-06-28 | 2013-05-14 | Intel Corporation | Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method |
US8877565B2 (en) * | 2007-06-28 | 2014-11-04 | Intel Corporation | Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method |
US7859360B2 (en) * | 2007-12-13 | 2010-12-28 | Broadcom Corporation | Method and system for controlling MEMS switches in an integrated circuit package |
US8134425B2 (en) * | 2007-12-13 | 2012-03-13 | Broadcom Corporation | Method and system for filters embedded in an integrated circuit package |
US8384500B2 (en) | 2007-12-13 | 2013-02-26 | Broadcom Corporation | Method and system for MEMS switches fabricated in an integrated circuit package |
US8115567B2 (en) * | 2007-12-13 | 2012-02-14 | Broadcom Corporation | Method and system for matching networks embedded in an integrated circuit package |
US7863998B2 (en) * | 2008-02-25 | 2011-01-04 | Broadcom Corporation | Method and system for processing signals via directional couplers embedded in an integrated circuit package |
US7859359B2 (en) * | 2008-02-25 | 2010-12-28 | Broadcom Corporation | Method and system for a balun embedded in an integrated circuit package |
US20090219908A1 (en) * | 2008-02-29 | 2009-09-03 | Ahmadreza Rofougaran | Method and system for processing signals via diplexers embedded in an integrated circuit package |
US8198714B2 (en) * | 2008-03-28 | 2012-06-12 | Broadcom Corporation | Method and system for configuring a transformer embedded in a multi-layer integrated circuit (IC) package |
US8269344B2 (en) * | 2008-03-28 | 2012-09-18 | Broadcom Corporation | Method and system for inter-chip communication via integrated circuit package waveguides |
US7982555B2 (en) | 2008-03-28 | 2011-07-19 | Broadcom Corporation | Method and system for processing signals via power splitters embedded in an integrated circuit package |
US8450846B2 (en) * | 2008-06-19 | 2013-05-28 | Broadcom Corporation | Method and system for communicating via flip-chip die and package waveguides |
US8384596B2 (en) * | 2008-06-19 | 2013-02-26 | Broadcom Corporation | Method and system for inter-chip communication via integrated circuit package antennas |
JP5310743B2 (ja) | 2008-12-22 | 2013-10-09 | 富士通株式会社 | 電子部品の製造方法 |
US8238842B2 (en) * | 2009-03-03 | 2012-08-07 | Broadcom Corporation | Method and system for an on-chip and/or an on-package transmit/receive switch and antenna |
US8521106B2 (en) * | 2009-06-09 | 2013-08-27 | Broadcom Corporation | Method and system for a sub-harmonic transmitter utilizing a leaky wave antenna |
JP2011091126A (ja) * | 2009-10-21 | 2011-05-06 | Shin-Etsu Astech Co Ltd | 発光装置(cobモジュール) |
US8654541B2 (en) * | 2011-03-24 | 2014-02-18 | Toyota Motor Engineering & Manufacturing North America, Inc. | Three-dimensional power electronics packages |
CN103781283A (zh) * | 2012-10-19 | 2014-05-07 | 先丰通讯股份有限公司 | 一种电路板制作方法 |
US9648753B2 (en) * | 2012-12-31 | 2017-05-09 | Amogreentech Co., Ltd. | Flexible printed circuit board and method for manufacturing same |
JP5874697B2 (ja) | 2013-08-28 | 2016-03-02 | 株式会社デンソー | 多層プリント基板およびその製造方法 |
TWI507906B (zh) * | 2014-01-06 | 2015-11-11 | Wistron Corp | 電路板承載電流的判斷方法、以及製程廠商的篩選方法及系統 |
JP2015159240A (ja) * | 2014-02-25 | 2015-09-03 | 矢崎総業株式会社 | フレキシブルフラット回路体 |
CN104916729A (zh) * | 2014-03-14 | 2015-09-16 | 株式会社东芝 | 光耦合装置 |
JP2015188051A (ja) * | 2014-03-14 | 2015-10-29 | 株式会社東芝 | 光結合装置 |
JP6044592B2 (ja) | 2014-05-29 | 2016-12-14 | トヨタ自動車株式会社 | 多層配線基板及びその製造方法 |
DE102016109853B4 (de) * | 2016-05-30 | 2021-08-12 | Infineon Technologies Ag | Chipträger und Halbleitervorrichtung mit Umverteilungsstrukturen sowie Verfahren zur Herstellung einer Umverteilungsstruktur |
CN106102310A (zh) * | 2016-07-29 | 2016-11-09 | 上海摩软通讯技术有限公司 | 电路板及其组件 |
US20230083970A1 (en) * | 2019-03-29 | 2023-03-16 | Essex Furukawa Magnet Wire Usa Llc | Magnet wire with thermoplastic insulation |
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JP2021057477A (ja) * | 2019-09-30 | 2021-04-08 | 株式会社村田製作所 | コイル部品の製造方法 |
WO2024127989A1 (ja) * | 2022-12-14 | 2024-06-20 | 株式会社村田製作所 | 多層基板及び多層基板の製造方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2684877B2 (ja) * | 1991-07-17 | 1997-12-03 | 株式会社デンソー | 多層基板 |
JPH08125339A (ja) * | 1994-10-21 | 1996-05-17 | Kyocera Corp | 多層配線基板の製造方法 |
JPH08264956A (ja) * | 1995-03-23 | 1996-10-11 | Internatl Business Mach Corp <Ibm> | 電気的接続構造 |
JPH09116273A (ja) * | 1995-08-11 | 1997-05-02 | Shinko Electric Ind Co Ltd | 多層回路基板及びその製造方法 |
DE19681758B4 (de) * | 1996-06-14 | 2006-09-14 | Ibiden Co., Ltd. | Einseitiges Schaltkreissubstrat für mehrlagige Schaltkreisplatine, mehrlagige Schaltkreisplatine und Verfahren zur Herstellung selbiger |
JP3241605B2 (ja) * | 1996-09-06 | 2001-12-25 | 松下電器産業株式会社 | 配線基板の製造方法並びに配線基板 |
JPH10117069A (ja) | 1996-10-08 | 1998-05-06 | Denki Kagaku Kogyo Kk | 金属ベース多層回路基板 |
JP3173439B2 (ja) * | 1997-10-14 | 2001-06-04 | 松下電器産業株式会社 | セラミック多層基板及びその製造方法 |
JP3355142B2 (ja) * | 1998-01-21 | 2002-12-09 | 三菱樹脂株式会社 | 耐熱性積層体用フィルムとこれを用いたプリント配線基板用素板および基板の製造方法 |
US6139777A (en) * | 1998-05-08 | 2000-10-31 | Matsushita Electric Industrial Co., Ltd. | Conductive paste for filling via-hole, double-sided and multilayer printed circuit boards using the same, and method for producing the same |
TW436882B (en) * | 1998-06-01 | 2001-05-28 | Toshiba Corp | Semiconductor device and method for manufacturing the same |
TW512653B (en) * | 1999-11-26 | 2002-12-01 | Ibiden Co Ltd | Multilayer circuit board and semiconductor device |
JP2001237550A (ja) * | 1999-12-14 | 2001-08-31 | Matsushita Electric Ind Co Ltd | 多層プリント配線板およびその製造方法 |
TWI242398B (en) * | 2000-06-14 | 2005-10-21 | Matsushita Electric Ind Co Ltd | Printed circuit board and method of manufacturing the same |
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- 2003-05-26 DE DE10323903A patent/DE10323903B4/de not_active Expired - Fee Related
- 2003-05-27 CN CNB031383424A patent/CN100346678C/zh not_active Expired - Fee Related
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KR100668273B1 (ko) * | 2004-08-20 | 2007-01-12 | 세이코 엡슨 가부시키가이샤 | 다층 구조 형성 방법, 배선 기판 및 전자 기기의 제조 방법 |
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DE10323903B4 (de) | 2011-02-10 |
US20030222340A1 (en) | 2003-12-04 |
KR100534548B1 (ko) | 2005-12-07 |
CN100346678C (zh) | 2007-10-31 |
DE10323903A1 (de) | 2003-12-11 |
TWI221759B (en) | 2004-10-01 |
JP2003347748A (ja) | 2003-12-05 |
TW200307495A (en) | 2003-12-01 |
JP3969192B2 (ja) | 2007-09-05 |
US6848178B2 (en) | 2005-02-01 |
CN1468048A (zh) | 2004-01-14 |
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