KR20030093204A - 유기질 유전체 에칭 중 탄화수소 첨가를 통한마이크로마스킹 제거 - Google Patents
유기질 유전체 에칭 중 탄화수소 첨가를 통한마이크로마스킹 제거 Download PDFInfo
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- KR20030093204A KR20030093204A KR10-2003-7010534A KR20037010534A KR20030093204A KR 20030093204 A KR20030093204 A KR 20030093204A KR 20037010534 A KR20037010534 A KR 20037010534A KR 20030093204 A KR20030093204 A KR 20030093204A
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- Prior art keywords
- layer
- dielectric layer
- etching
- wafer
- hardmask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
Abstract
Description
Claims (18)
- 웨이퍼 유전층의 특징부 에칭 방법으로서,- 반응 챔버 내에 웨이퍼를 배치하고,- 탄화수소 첨가제와 활성 에칭제를 포함하는 에칭제 기체를 반응 챔버 내로 유입시키며,- 상기 에칭제 기체로부터 플라즈마를 상기 반응 챔버 내에 형성하고, 그리고- 상기 유전층 일부에서 특징부를 에칭하는,이상의 단계를 포함하는 것을 특징으로 하는 웨이퍼 유전층의 특징부 에칭 방법.
- 제 1 항에 있어서, 상기 유전층이 하드마스크층 아래에 놓이는 것을 특징으로 하는 방법.
- 제 2 항에 있어서, 상기 탄화수소가 CH4, C2H4, C2H6중에서 선택되는 것을 특징으로 하는 방법.
- 제 3 항에 있어서, 상기 탄화수소가 1 sccm 이상의 유량을 가지는 것을 특징으로 하는 방법.
- 제 4 항에 있어서, 하드마스크 스퍼터링을 감소시키기 위해 상기 탄화수소로부터 폴리머층을 상기 하드마스크층 위에 형성하고 이와 동시에 상기 하드마스크층 위의 폴리머층을 에칭하여 제거하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 5 항에 있어서, 상기 탄화수소가 3 내지 20 sccm의 유량을 가지는 것을 특징으로 하는 방법.
- 제 6 항에 있어서, 상기 하드마스크가 포토레지스트 마스크 아래에 위치하고, 상기 유전층이 유기질 유전층인 것을 특징으로 하는 방법.
- 제 7 항에 있어서, 하드 마스크 에칭을 실행하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 2 항에 있어서, 하드 마스크 에칭을 실행하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 9 항에 있어서, 하드마스크 스퍼터링을 감소시키기 위해 하드마스크층 위에 폴리머층을 형성하고 이와 동시에 에칭하여 제거하는 단계를 추가로 포함하는 것을 특징으로 하는 방법.
- 제 10 항에 있어서, 상기 탄화수소가 1sccm 이상의 유량을 가지는 것을 특징으로 하는 방법.
- 제 11 항에 있어서, 상기 하드마스크가 포토레지스트 마스크 아래에 배치되고, 상기 유전층이 유기질 유전층인 것을 특징으로 하는 방법.
- 제 10 항에 있어서, 상기 하드마스크가 포토레지스트 마스크 아래에 배치되고, 상기 유전층이 유기질 유전층인 것을 특징으로 하는 방법.
- - 반응 챔버 내에 웨이퍼를 배치하고,- 탄화수소 첨가제와 활성 에칭제를 포함하는 에칭제 기체를 반응챔버 내로 유입시키며,- 상기 에칭제 기체로부터 플라즈마를 반응 챔버 내에 형성하고, 그리고- 상기 유전층 일부에서 특징부를 에칭하는이상의 단계를 포함하는 방법에 의해 특징부가 에칭되는, 웨이퍼 상에 한개 이상의 유전층에 형성되는 특징부를 가지는 집적 회로.
- 제 14 항에 있어서, 상기 유전층이 하드마스크 층 아래에 위치하는 것을 특징으로 하는 집적 회로.
- 제 15 항에 있어서, 하드마스크 스퍼터링을 감소시키기 위해, 하드마스크층 위에 폴리머층을 형성함과 동시에 폴리머층을 에칭하여 제거하는 단계를 추가로 포함하는 것을 특징으로 하는 집적 회로.
- 제 16 항에 있어서, 상기 하드마스크가 포토레지스트 마스크 아래에 배치되고, 상기 유전층이 유기질 유전층인 것을 특징으로 하는 집적 회로.
- 제 17 항에 있어서, 하드 마스크 에칭을 실행하는 단계를 추가로 포함하는 것을 특징으로 하는 집적 회로.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/782,437 | 2001-02-12 | ||
US09/782,437 US6620733B2 (en) | 2001-02-12 | 2001-02-12 | Use of hydrocarbon addition for the elimination of micromasking during etching of organic low-k dielectrics |
PCT/US2002/003615 WO2002065530A2 (en) | 2001-02-12 | 2002-02-07 | Use of hydrocarbon addition for the elimination of micromasking during etching of organic low-k dielectrics |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030093204A true KR20030093204A (ko) | 2003-12-06 |
KR100854609B1 KR100854609B1 (ko) | 2008-08-27 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020037010534A KR100854609B1 (ko) | 2001-02-12 | 2002-02-07 | 피쳐 에칭 방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6620733B2 (ko) |
KR (1) | KR100854609B1 (ko) |
CN (1) | CN1286153C (ko) |
AU (1) | AU2002247089A1 (ko) |
TW (1) | TW535197B (ko) |
WO (1) | WO2002065530A2 (ko) |
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KR101468249B1 (ko) * | 2007-05-24 | 2014-12-03 | 램 리써치 코포레이션 | 액티브 하드 마스크의 플라즈마 식각 동안 인-시튜 포토레지스트 스트립 |
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2001
- 2001-02-12 US US09/782,437 patent/US6620733B2/en not_active Expired - Lifetime
-
2002
- 2002-02-07 WO PCT/US2002/003615 patent/WO2002065530A2/en not_active Application Discontinuation
- 2002-02-07 CN CNB028081528A patent/CN1286153C/zh not_active Expired - Fee Related
- 2002-02-07 TW TW091102245A patent/TW535197B/zh not_active IP Right Cessation
- 2002-02-07 KR KR1020037010534A patent/KR100854609B1/ko active IP Right Grant
- 2002-02-07 AU AU2002247089A patent/AU2002247089A1/en not_active Abandoned
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101468249B1 (ko) * | 2007-05-24 | 2014-12-03 | 램 리써치 코포레이션 | 액티브 하드 마스크의 플라즈마 식각 동안 인-시튜 포토레지스트 스트립 |
Also Published As
Publication number | Publication date |
---|---|
US6620733B2 (en) | 2003-09-16 |
CN1502119A (zh) | 2004-06-02 |
TW535197B (en) | 2003-06-01 |
WO2002065530B1 (en) | 2003-07-24 |
WO2002065530A2 (en) | 2002-08-22 |
KR100854609B1 (ko) | 2008-08-27 |
WO2002065530A3 (en) | 2003-05-15 |
AU2002247089A1 (en) | 2002-08-28 |
CN1286153C (zh) | 2006-11-22 |
US20020110992A1 (en) | 2002-08-15 |
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