KR19990035792A - 주파수 발생 회로 및 수신 장치 - Google Patents

주파수 발생 회로 및 수신 장치 Download PDF

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Publication number
KR19990035792A
KR19990035792A KR1019980700451A KR19980700451A KR19990035792A KR 19990035792 A KR19990035792 A KR 19990035792A KR 1019980700451 A KR1019980700451 A KR 1019980700451A KR 19980700451 A KR19980700451 A KR 19980700451A KR 19990035792 A KR19990035792 A KR 19990035792A
Authority
KR
South Korea
Prior art keywords
frequency
clock
output
counter
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019980700451A
Other languages
English (en)
Korean (ko)
Inventor
파울 스테워트 마르스톤
에베르트 데 판 펠듀이젠
Original Assignee
엠. 제이. 엠. 반캄
코닌클리케 필립스 일렉트로닉스 엔. 브이
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엠. 제이. 엠. 반캄, 코닌클리케 필립스 일렉트로닉스 엔. 브이 filed Critical 엠. 제이. 엠. 반캄
Publication of KR19990035792A publication Critical patent/KR19990035792A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/02—Automatic control of frequency or phase; Synchronisation using a frequency discriminator comprising a passive frequency-determining element

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
KR1019980700451A 1996-05-23 1997-04-01 주파수 발생 회로 및 수신 장치 Ceased KR19990035792A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9610801.4A GB9610801D0 (en) 1996-05-23 1996-05-23 Frequency generating circuit
GB9610801.4 1996-05-23

Publications (1)

Publication Number Publication Date
KR19990035792A true KR19990035792A (ko) 1999-05-25

Family

ID=10794196

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980700451A Ceased KR19990035792A (ko) 1996-05-23 1997-04-01 주파수 발생 회로 및 수신 장치

Country Status (9)

Country Link
US (1) US6167097A (enExample)
EP (1) EP0840965B1 (enExample)
JP (1) JPH11510031A (enExample)
KR (1) KR19990035792A (enExample)
CN (1) CN1198277A (enExample)
DE (1) DE69708025T2 (enExample)
GB (1) GB9610801D0 (enExample)
IN (1) IN191644B (enExample)
WO (1) WO1997044930A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030096930A (ko) * 2002-06-18 2003-12-31 삼성전기주식회사 프로그램가능 분주기의 투 모듈러스 카운터
KR100723537B1 (ko) * 2006-09-12 2007-05-30 삼성전자주식회사 클럭 신호 발생 방법 및 장치와 이를 이용한 클럭 주파수제어 방법 및 장치

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6629256B1 (en) * 2000-04-04 2003-09-30 Texas Instruments Incorporated Apparatus for and method of generating a clock from an available clock of arbitrary frequency
US6504486B1 (en) * 2000-11-06 2003-01-07 Sun Microsystems, Inc. Dual voltage sense cell for input/output dynamic termination logic
US6799134B2 (en) * 2002-08-09 2004-09-28 Texas Instruments Incorporated Characterization of self-timed sequential circuits
US8132041B2 (en) * 2007-12-20 2012-03-06 Qualcomm Incorporated Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals
US7830216B1 (en) * 2008-09-23 2010-11-09 Silicon Labs Sc, Inc. Precision, temperature stable clock using a frequency-control circuit and a single oscillator
US7764131B1 (en) 2008-09-23 2010-07-27 Silicon Labs Sc, Inc. Precision, temperature stable clock using a frequency-control circuit and dual oscillators
US8058940B1 (en) 2008-10-24 2011-11-15 Silicon Laboratories Inc. Dual in-situ mixing for extended tuning range of resonators
JP5124622B2 (ja) * 2010-07-26 2013-01-23 能美防災株式会社 火災感知器および火災報知設備
CN109995346B (zh) * 2019-03-06 2020-08-04 杭州城芯科技有限公司 一种基于时钟吞咽电路的高频时钟同步电路
CN112865791B (zh) * 2021-01-11 2024-01-23 星宸科技股份有限公司 频率产生器装置、图像处理芯片以及频率信号校正方法
CN115001457B (zh) * 2022-05-26 2024-12-06 深圳数马电子技术有限公司 时钟校准电路、装置及方法
CN115037285B (zh) * 2022-05-26 2025-02-14 深圳数马电子技术有限公司 时钟校准装置、设备及方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4280099A (en) * 1979-11-09 1981-07-21 Sperry Corporation Digital timing recovery system
DE3616590A1 (de) * 1986-05-16 1987-11-19 Blaupunkt Werke Gmbh System zur decodierung von datensignalen
US5052026A (en) * 1989-02-07 1991-09-24 Harris Corporation Bit synchronizer for short duration burst communications
JP3181396B2 (ja) * 1992-09-29 2001-07-03 沖電気工業株式会社 クロック発生回路
DE4403124C2 (de) * 1994-02-02 1997-02-13 Telefunken Microelectron Verfahren zum Betrieb einer Funkuhr
JP2929965B2 (ja) * 1995-03-31 1999-08-03 日本電気株式会社 無線通信端局

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030096930A (ko) * 2002-06-18 2003-12-31 삼성전기주식회사 프로그램가능 분주기의 투 모듈러스 카운터
KR100723537B1 (ko) * 2006-09-12 2007-05-30 삼성전자주식회사 클럭 신호 발생 방법 및 장치와 이를 이용한 클럭 주파수제어 방법 및 장치

Also Published As

Publication number Publication date
IN191644B (enExample) 2003-12-13
JPH11510031A (ja) 1999-08-31
DE69708025T2 (de) 2002-06-20
DE69708025D1 (de) 2001-12-13
EP0840965B1 (en) 2001-11-07
WO1997044930A1 (en) 1997-11-27
EP0840965A1 (en) 1998-05-13
GB9610801D0 (en) 1996-07-31
CN1198277A (zh) 1998-11-04
US6167097A (en) 2000-12-26

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Patent event date: 19980121

Patent event code: PA01051R01D

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Patent event code: PE06011S01I