KR102338029B1 - 반도체장치, 적층형 반도체장치, 봉지후 적층형 반도체장치, 및 이들의 제조방법 - Google Patents

반도체장치, 적층형 반도체장치, 봉지후 적층형 반도체장치, 및 이들의 제조방법 Download PDF

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KR102338029B1
KR102338029B1 KR1020167027164A KR20167027164A KR102338029B1 KR 102338029 B1 KR102338029 B1 KR 102338029B1 KR 1020167027164 A KR1020167027164 A KR 1020167027164A KR 20167027164 A KR20167027164 A KR 20167027164A KR 102338029 B1 KR102338029 B1 KR 102338029B1
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semiconductor device
insulating layer
electrode
metal wiring
photocurable
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KR20160138081A (ko
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카츠야 타케무라
쿄코 소가
사토시 아사이
카즈노리 콘도
미치히로 수고
히데토 카토
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신에쓰 가가꾸 고교 가부시끼가이샤
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    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
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    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
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    • H10W90/00—Package configurations
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    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
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    • H10W90/00—Package configurations
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    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Electrochemistry (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Composite Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Formation Of Insulating Films (AREA)
  • Power Engineering (AREA)
KR1020167027164A 2014-03-31 2015-03-12 반도체장치, 적층형 반도체장치, 봉지후 적층형 반도체장치, 및 이들의 제조방법 Active KR102338029B1 (ko)

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PCT/JP2015/001367 WO2015151417A1 (ja) 2014-03-31 2015-03-12 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法

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WO2020129808A1 (ja) * 2018-12-21 2020-06-25 株式会社村田製作所 電子部品モジュールの製造方法及び電子部品モジュール
KR102599631B1 (ko) * 2020-06-08 2023-11-06 삼성전자주식회사 반도체 칩, 반도체 장치, 및 이를 포함하는 반도체 패키지
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JP7728155B2 (ja) * 2021-11-18 2025-08-22 イビデン株式会社 プリント配線板の製造方法
JP7728154B2 (ja) * 2021-11-18 2025-08-22 イビデン株式会社 プリント配線板の製造方法
JP2023074860A (ja) * 2021-11-18 2023-05-30 イビデン株式会社 プリント配線板の製造方法
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JP6031060B2 (ja) 2016-11-24
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CN110176432B (zh) 2023-06-20
TW201602425A (zh) 2016-01-16
US10319653B2 (en) 2019-06-11
US20170103932A1 (en) 2017-04-13
JP2015195240A (ja) 2015-11-05
TWI648439B (zh) 2019-01-21
CN110176432A (zh) 2019-08-27
WO2015151417A1 (ja) 2015-10-08
CN106165086B (zh) 2019-12-06
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CN106165086A (zh) 2016-11-23
EP3128549B1 (en) 2021-09-01

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