KR101703017B1 - 기판 상에 ⅲ-ⅴ족 층을 퇴적하기 위한 방법 - Google Patents
기판 상에 ⅲ-ⅴ족 층을 퇴적하기 위한 방법 Download PDFInfo
- Publication number
- KR101703017B1 KR101703017B1 KR1020147022670A KR20147022670A KR101703017B1 KR 101703017 B1 KR101703017 B1 KR 101703017B1 KR 1020147022670 A KR1020147022670 A KR 1020147022670A KR 20147022670 A KR20147022670 A KR 20147022670A KR 101703017 B1 KR101703017 B1 KR 101703017B1
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- South Korea
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- layer
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- silicon
- group iii
- depositing
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3416—Nitrides
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
- H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
- H10D64/0113—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2926—Crystal orientations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3418—Phosphides
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3421—Arsenides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
- H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261586184P | 2012-01-13 | 2012-01-13 | |
| US61/586,184 | 2012-01-13 | ||
| US13/736,504 | 2013-01-08 | ||
| US13/736,504 US9299560B2 (en) | 2012-01-13 | 2013-01-08 | Methods for depositing group III-V layers on substrates |
| PCT/US2013/020804 WO2013106411A1 (en) | 2012-01-13 | 2013-01-09 | Methods for depositing group iii-v layers on substrates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20140113724A KR20140113724A (ko) | 2014-09-24 |
| KR101703017B1 true KR101703017B1 (ko) | 2017-02-06 |
Family
ID=48780254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020147022670A Active KR101703017B1 (ko) | 2012-01-13 | 2013-01-09 | 기판 상에 ⅲ-ⅴ족 층을 퇴적하기 위한 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9299560B2 (https=) |
| JP (1) | JP6109852B2 (https=) |
| KR (1) | KR101703017B1 (https=) |
| CN (2) | CN107507763A (https=) |
| TW (1) | TWI566277B (https=) |
| WO (1) | WO2013106411A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8647439B2 (en) * | 2012-04-26 | 2014-02-11 | Applied Materials, Inc. | Method of epitaxial germanium tin alloy surface preparation |
| GB201311101D0 (en) * | 2013-06-21 | 2013-08-07 | Norwegian Univ Sci & Tech Ntnu | Semiconducting Films |
| US10118828B2 (en) * | 2015-10-02 | 2018-11-06 | Asm Ip Holding B.V. | Tritertbutyl aluminum reactants for vapor deposition |
| KR102528559B1 (ko) * | 2016-07-26 | 2023-05-04 | 삼성전자주식회사 | 대면적 기판 제조 장치 |
| JP6769486B2 (ja) | 2016-08-31 | 2020-10-14 | 富士通株式会社 | 半導体結晶基板の製造方法、赤外線検出装置の製造方法 |
| GB201705755D0 (en) | 2017-04-10 | 2017-05-24 | Norwegian Univ Of Science And Tech (Ntnu) | Nanostructure |
| JP7099398B2 (ja) | 2019-04-18 | 2022-07-12 | 株式会社Sumco | 気相成長方法及び気相成長装置 |
| KR102737089B1 (ko) | 2020-07-03 | 2024-12-03 | 삼성디스플레이 주식회사 | 표시 장치 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050026392A1 (en) | 2001-12-21 | 2005-02-03 | Holger Jurgensen | Method for depositing III-V semiconductor layers on a non-III-V substrate |
| US20100163931A1 (en) | 2006-03-20 | 2010-07-01 | Kanagawa Academy Of Science And Technology | Group iii-v nitride layer and method for producing the same |
| US20110104875A1 (en) | 2009-10-30 | 2011-05-05 | Wojtczak William A | Selective silicon etch process |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61265814A (ja) * | 1985-05-20 | 1986-11-25 | Nec Corp | 化合物半導体装置の製造方法 |
| JP2680310B2 (ja) * | 1987-06-30 | 1997-11-19 | 株式会社東芝 | 半導体素子の製造方法 |
| JPH0822800B2 (ja) * | 1989-02-21 | 1996-03-06 | 日本電気株式会社 | ▲iii▼―v族化合物半導体薄膜の形成方法 |
| JP2760576B2 (ja) * | 1989-06-15 | 1998-06-04 | 株式会社東芝 | 半導体装置 |
| JP2557546B2 (ja) * | 1990-03-30 | 1996-11-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JPH0484418A (ja) * | 1990-07-27 | 1992-03-17 | Nec Corp | 異種基板上への3―v族化合物半導体のヘテロエピタキシャル成長法 |
| DE69229265T2 (de) * | 1991-03-18 | 1999-09-23 | Trustees Of Boston University, Boston | Verfahren zur herstellung und dotierung hochisolierender dünner schichten aus monokristallinem galliumnitrid |
| JP3078927B2 (ja) * | 1992-06-29 | 2000-08-21 | 富士通株式会社 | 化合物半導体薄膜の成長方法 |
| JP3761918B2 (ja) * | 1994-09-13 | 2006-03-29 | 株式会社東芝 | 半導体装置の製造方法 |
| JPH08167576A (ja) * | 1994-12-14 | 1996-06-25 | Fujitsu Ltd | ヘテロエピタキシャル半導体基板の形成方法、かかるヘテロエピタキシャル半導体基板を有する化合物半導体装置、およびその製造方法 |
| JP3349316B2 (ja) * | 1995-12-05 | 2002-11-25 | 古河電気工業株式会社 | エピタキシャル成長方法 |
| US6064078A (en) | 1998-05-22 | 2000-05-16 | Xerox Corporation | Formation of group III-V nitride films on sapphire substrates with reduced dislocation densities |
| JP2000164515A (ja) * | 1998-11-27 | 2000-06-16 | Kyocera Corp | 化合物半導体基板およびその形成方法 |
| JP2000269142A (ja) * | 1999-03-17 | 2000-09-29 | Sony Corp | 窒化ガリウムエピタキシャル層の形成方法及び発光素子 |
| JP2000311903A (ja) * | 1999-04-27 | 2000-11-07 | Kyocera Corp | 化合物半導体基板およびその製造方法 |
| JP4514868B2 (ja) * | 1999-12-28 | 2010-07-28 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| DE10219223A1 (de) * | 2001-12-21 | 2003-07-17 | Aixtron Ag | Verfahren zum Abscheiden von III-V-Halbleiterschichten auf einem Nicht-III-V-Substrat |
| JP2005109346A (ja) * | 2003-10-01 | 2005-04-21 | Seiko Epson Corp | 半導体装置および半導体装置の製造方法 |
| JP2007194337A (ja) * | 2006-01-18 | 2007-08-02 | Sony Corp | 半導体装置およびその製造方法 |
| US7355254B2 (en) | 2006-06-30 | 2008-04-08 | Intel Corporation | Pinning layer for low resistivity N-type source drain ohmic contacts |
| US20090149008A1 (en) * | 2007-10-05 | 2009-06-11 | Applied Materials, Inc. | Method for depositing group iii/v compounds |
| DE102009042349B4 (de) * | 2009-09-20 | 2011-06-16 | Otto-Von-Guericke-Universität Magdeburg | Semipolare wurtzitische Gruppe-III-Nitrid basierte Halbleiterschichten und darauf basierende Halbleiterbauelemente |
| KR101643758B1 (ko) * | 2009-11-23 | 2016-08-01 | 삼성전자주식회사 | 분자빔 에피탁시 방법을 이용한 카본 절연층 제조방법 및 이를 이용한 전계효과 트랜지스터 제조방법 |
| US8129205B2 (en) * | 2010-01-25 | 2012-03-06 | Micron Technology, Inc. | Solid state lighting devices and associated methods of manufacturing |
| US8242540B2 (en) * | 2010-06-11 | 2012-08-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Epitaxial growth of III-V compound semiconductors on silicon surfaces |
-
2013
- 2013-01-08 US US13/736,504 patent/US9299560B2/en not_active Expired - Fee Related
- 2013-01-09 JP JP2014552262A patent/JP6109852B2/ja active Active
- 2013-01-09 CN CN201710569349.0A patent/CN107507763A/zh active Pending
- 2013-01-09 KR KR1020147022670A patent/KR101703017B1/ko active Active
- 2013-01-09 CN CN201380004957.7A patent/CN104040706B/zh active Active
- 2013-01-09 WO PCT/US2013/020804 patent/WO2013106411A1/en not_active Ceased
- 2013-01-10 TW TW102100950A patent/TWI566277B/zh active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050026392A1 (en) | 2001-12-21 | 2005-02-03 | Holger Jurgensen | Method for depositing III-V semiconductor layers on a non-III-V substrate |
| US20100163931A1 (en) | 2006-03-20 | 2010-07-01 | Kanagawa Academy Of Science And Technology | Group iii-v nitride layer and method for producing the same |
| US20110104875A1 (en) | 2009-10-30 | 2011-05-05 | Wojtczak William A | Selective silicon etch process |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015512139A (ja) | 2015-04-23 |
| CN107507763A (zh) | 2017-12-22 |
| US20130183815A1 (en) | 2013-07-18 |
| TWI566277B (zh) | 2017-01-11 |
| TW201331989A (zh) | 2013-08-01 |
| JP6109852B2 (ja) | 2017-04-05 |
| CN104040706A (zh) | 2014-09-10 |
| CN104040706B (zh) | 2017-08-08 |
| KR20140113724A (ko) | 2014-09-24 |
| US9299560B2 (en) | 2016-03-29 |
| WO2013106411A1 (en) | 2013-07-18 |
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