KR101537925B1 - 반도체 장치, 및 그 제작 방법 - Google Patents

반도체 장치, 및 그 제작 방법 Download PDF

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Publication number
KR101537925B1
KR101537925B1 KR1020080099597A KR20080099597A KR101537925B1 KR 101537925 B1 KR101537925 B1 KR 101537925B1 KR 1020080099597 A KR1020080099597 A KR 1020080099597A KR 20080099597 A KR20080099597 A KR 20080099597A KR 101537925 B1 KR101537925 B1 KR 101537925B1
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South Korea
Prior art keywords
single crystal
film
crystal semiconductor
substrate
layer
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English (en)
Korean (ko)
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KR20090037352A (ko
Inventor
?페이 야마자키
쥬니치 코에쥬카
테츄야 카케하타
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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Publication of KR20090037352A publication Critical patent/KR20090037352A/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020080099597A 2007-10-10 2008-10-10 반도체 장치, 및 그 제작 방법 Expired - Fee Related KR101537925B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2007-00264719 2007-10-10
JP2007264719 2007-10-10

Publications (2)

Publication Number Publication Date
KR20090037352A KR20090037352A (ko) 2009-04-15
KR101537925B1 true KR101537925B1 (ko) 2015-07-20

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KR1020080099597A Expired - Fee Related KR101537925B1 (ko) 2007-10-10 2008-10-10 반도체 장치, 및 그 제작 방법

Country Status (3)

Country Link
US (1) US7851332B2 (enExample)
JP (1) JP5506172B2 (enExample)
KR (1) KR101537925B1 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009094488A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
TWI437696B (zh) 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
TWI493609B (zh) * 2007-10-23 2015-07-21 Semiconductor Energy Lab 半導體基板、顯示面板及顯示裝置的製造方法
US8432021B2 (en) * 2009-05-26 2013-04-30 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
US8630326B2 (en) 2009-10-13 2014-01-14 Skorpios Technologies, Inc. Method and system of heterogeneous substrate bonding for photonic integration
US8735191B2 (en) * 2012-01-04 2014-05-27 Skorpios Technologies, Inc. Method and system for template assisted wafer bonding using pedestals
US9922967B2 (en) 2010-12-08 2018-03-20 Skorpios Technologies, Inc. Multilevel template assisted wafer bonding
JP5680987B2 (ja) * 2011-02-18 2015-03-04 株式会社アドバンテスト 半導体装置、試験装置、および製造方法
JP5417399B2 (ja) * 2011-09-15 2014-02-12 信越化学工業株式会社 複合ウェーハの製造方法
US9041147B2 (en) * 2012-01-10 2015-05-26 Sharp Kabushiki Kaisha Semiconductor substrate, thin film transistor, semiconductor circuit, liquid crystal display apparatus, electroluminescent apparatus, semiconductor substrate manufacturing method, and semiconductor substrate manufacturing apparatus
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
US9209142B1 (en) 2014-09-05 2015-12-08 Skorpios Technologies, Inc. Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal
KR102407529B1 (ko) * 2015-10-30 2022-06-10 엘지디스플레이 주식회사 플렉서블 표시 장치와 그의 제조 방법
JP6597865B2 (ja) * 2018-10-16 2019-10-30 大日本印刷株式会社 テンプレート基板の製造方法、および、ナノインプリント用テンプレートの製造方法
KR102631767B1 (ko) * 2019-08-22 2024-02-01 주식회사 효산 디스플레이 제조용 기판 및 이의 제조 방법
TWI888525B (zh) * 2020-04-08 2025-07-01 荷蘭商Asm Ip私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
CN113985219B (zh) * 2021-09-24 2024-05-31 浙江华云电力工程设计咨询有限公司 一种开关柜局部放电和温度联合监测系统及监测方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003172950A (ja) * 2001-06-22 2003-06-20 Seiko Epson Corp 電気光学装置及びその製造方法並びに電子機器
JP2004246028A (ja) * 2003-02-13 2004-09-02 Seiko Epson Corp デバイスの製造方法及びこれを用いて製造されたデバイス、複合基板の製造方法、電気光学装置、並びに電子機器
JP2006332634A (ja) * 2005-04-28 2006-12-07 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
WO2007014320A2 (en) * 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6388652B1 (en) 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3525061B2 (ja) * 1998-09-25 2004-05-10 株式会社東芝 半導体発光素子の製造方法
JP4450126B2 (ja) * 2000-01-21 2010-04-14 日新電機株式会社 シリコン系結晶薄膜の形成方法
JP4182323B2 (ja) 2002-02-27 2008-11-19 ソニー株式会社 複合基板、基板製造方法
US6818529B2 (en) 2002-09-12 2004-11-16 Applied Materials, Inc. Apparatus and method for forming a silicon film across the surface of a glass substrate
TWI351566B (en) * 2003-01-15 2011-11-01 Semiconductor Energy Lab Liquid crystal display device
US7105448B2 (en) * 2003-02-28 2006-09-12 Semiconductor Energy Laboratory Co., Ltd. Method for peeling off semiconductor element and method for manufacturing semiconductor device
JP4082242B2 (ja) * 2003-03-06 2008-04-30 ソニー株式会社 素子転写方法
JP4407384B2 (ja) * 2004-05-28 2010-02-03 株式会社Sumco Soi基板の製造方法
JP4624131B2 (ja) * 2005-02-22 2011-02-02 三洋電機株式会社 窒化物系半導体素子の製造方法
US7510950B2 (en) * 2005-06-30 2009-03-31 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US8164257B2 (en) * 2006-01-25 2012-04-24 Samsung Mobile Display Co., Ltd. Organic light emitting display and method of fabricating the same
US7713836B2 (en) * 2006-09-29 2010-05-11 Semiconductor Energy Laboratory Co., Ltd. Method for forming conductive layer and substrate having the same, and method for manufacturing semiconductor device
US8119204B2 (en) * 2007-04-27 2012-02-21 Semiconductor Energy Laboratory Co., Ltd. Film formation method and method for manufacturing light-emitting device
KR100882932B1 (ko) * 2007-06-11 2009-02-10 삼성전자주식회사 반도체 기판 및 그 제조 방법, 반도체 소자의 제조 방법 및이미지 센서의 제조 방법
US20100015782A1 (en) * 2008-07-18 2010-01-21 Chen-Hua Yu Wafer Dicing Methods

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003172950A (ja) * 2001-06-22 2003-06-20 Seiko Epson Corp 電気光学装置及びその製造方法並びに電子機器
JP2004246028A (ja) * 2003-02-13 2004-09-02 Seiko Epson Corp デバイスの製造方法及びこれを用いて製造されたデバイス、複合基板の製造方法、電気光学装置、並びに電子機器
JP2006332634A (ja) * 2005-04-28 2006-12-07 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
WO2007014320A2 (en) * 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process

Also Published As

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JP2009111354A (ja) 2009-05-21
JP5506172B2 (ja) 2014-05-28
US7851332B2 (en) 2010-12-14
US20090096054A1 (en) 2009-04-16
KR20090037352A (ko) 2009-04-15

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