KR101487371B1 - 기판의 재활용 방법, 적층 웨이퍼 제작 방법 및 적합한 재활용 도너 기판 - Google Patents
기판의 재활용 방법, 적층 웨이퍼 제작 방법 및 적합한 재활용 도너 기판 Download PDFInfo
- Publication number
- KR101487371B1 KR101487371B1 KR1020097024059A KR20097024059A KR101487371B1 KR 101487371 B1 KR101487371 B1 KR 101487371B1 KR 1020097024059 A KR1020097024059 A KR 1020097024059A KR 20097024059 A KR20097024059 A KR 20097024059A KR 101487371 B1 KR101487371 B1 KR 101487371B1
- Authority
- KR
- South Korea
- Prior art keywords
- substrate
- region
- removal
- layer
- deformation zone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/16—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/24488—Differential nonuniformity at margin
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
- Recrystallisation Techniques (AREA)
- Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP07290869.2 | 2007-07-11 | ||
| EP07290869A EP2015354A1 (en) | 2007-07-11 | 2007-07-11 | Method for recycling a substrate, laminated wafer fabricating method and suitable recycled donor substrate |
| EP08290490A EP2037495B1 (en) | 2007-07-11 | 2008-05-28 | Method for recycling a substrate, laminated wafer fabricating method and suitable recycled donor substrate |
| EP08290490.5 | 2008-05-28 | ||
| PCT/EP2008/005107 WO2009007003A1 (en) | 2007-07-11 | 2008-06-24 | Method for recycling a substrate, laminated water fabricating method and suitable recycled donor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100044142A KR20100044142A (ko) | 2010-04-29 |
| KR101487371B1 true KR101487371B1 (ko) | 2015-01-29 |
Family
ID=38896813
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020097024059A Active KR101487371B1 (ko) | 2007-07-11 | 2008-06-24 | 기판의 재활용 방법, 적층 웨이퍼 제작 방법 및 적합한 재활용 도너 기판 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8324075B2 (https=) |
| EP (2) | EP2015354A1 (https=) |
| JP (1) | JP5099859B2 (https=) |
| KR (1) | KR101487371B1 (https=) |
| CN (1) | CN101689530B (https=) |
| AT (1) | ATE504083T1 (https=) |
| DE (1) | DE602008005817D1 (https=) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8871109B2 (en) | 2009-04-28 | 2014-10-28 | Gtat Corporation | Method for preparing a donor surface for reuse |
| FR2999801B1 (fr) * | 2012-12-14 | 2014-12-26 | Soitec Silicon On Insulator | Procede de fabrication d'une structure |
| US20140268273A1 (en) * | 2013-03-15 | 2014-09-18 | Pixtronix, Inc. | Integrated elevated aperture layer and display apparatus |
| US8946054B2 (en) | 2013-04-19 | 2015-02-03 | International Business Machines Corporation | Crack control for substrate separation |
| US10535685B2 (en) | 2013-12-02 | 2020-01-14 | The Regents Of The University Of Michigan | Fabrication of thin-film electronic devices with non-destructive wafer reuse |
| CN104119815B (zh) * | 2014-08-04 | 2015-08-19 | 博洛尼家居用品(北京)股份有限公司 | 一种双面胶带 |
| FR3048548B1 (fr) * | 2016-03-02 | 2018-03-02 | Soitec | Procede de determination d'une energie convenable d'implantation dans un substrat donneur et procede de fabrication d'une structure de type semi-conducteur sur isolant |
| US20180033609A1 (en) * | 2016-07-28 | 2018-02-01 | QMAT, Inc. | Removal of non-cleaved/non-transferred material from donor substrate |
| FR3063176A1 (fr) * | 2017-02-17 | 2018-08-24 | Soitec | Masquage d'une zone au bord d'un substrat donneur lors d'une etape d'implantation ionique |
| FR3074608B1 (fr) * | 2017-12-05 | 2019-12-06 | Soitec | Procede de preparation d'un residu de substrat donneur, substrat obtenu a l'issu de ce procede, et utilisation d'un tel susbtrat |
| KR102287395B1 (ko) * | 2019-02-28 | 2021-08-06 | 김용석 | 플렉시블 전자 소자의 제조방법 및 그로부터 제조된 플렉시블 전자 소자 |
| KR102523640B1 (ko) | 2022-01-28 | 2023-04-19 | 주식회사 이노와이어리스 | 이동통신 단말 시험용 실드 박스 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001155978A (ja) * | 1999-11-29 | 2001-06-08 | Shin Etsu Handotai Co Ltd | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| JP2007116161A (ja) * | 2005-10-18 | 2007-05-10 | Soi Tec Silicon On Insulator Technologies | エピタキシ済みドナー・ウェファをリサイクルする方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5668045A (en) * | 1994-11-30 | 1997-09-16 | Sibond, L.L.C. | Process for stripping outer edge of BESOI wafers |
| JP3932369B2 (ja) | 1998-04-09 | 2007-06-20 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
| US6664169B1 (en) * | 1999-06-08 | 2003-12-16 | Canon Kabushiki Kaisha | Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus |
| JP3472197B2 (ja) * | 1999-06-08 | 2003-12-02 | キヤノン株式会社 | 半導体基材及び太陽電池の製造方法 |
| KR100730806B1 (ko) * | 1999-10-14 | 2007-06-20 | 신에쯔 한도타이 가부시키가이샤 | Soi웨이퍼의 제조방법 및 soi 웨이퍼 |
| TWI233154B (en) | 2002-12-06 | 2005-05-21 | Soitec Silicon On Insulator | Method for recycling a substrate |
| FR2892228B1 (fr) * | 2005-10-18 | 2008-01-25 | Soitec Silicon On Insulator | Procede de recyclage d'une plaquette donneuse epitaxiee |
| FR2852445B1 (fr) * | 2003-03-14 | 2005-05-20 | Soitec Silicon On Insulator | Procede de realisation de substrats ou composants sur substrats avec transfert de couche utile, pour la microelectronique, l'optoelectronique ou l'optique |
| US7402520B2 (en) | 2004-11-26 | 2008-07-22 | Applied Materials, Inc. | Edge removal of silicon-on-insulator transfer wafer |
| FR2888400B1 (fr) * | 2005-07-08 | 2007-10-19 | Soitec Silicon On Insulator | Procede de prelevement de couche |
| JP4715470B2 (ja) * | 2005-11-28 | 2011-07-06 | 株式会社Sumco | 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ |
-
2007
- 2007-07-11 EP EP07290869A patent/EP2015354A1/en not_active Withdrawn
-
2008
- 2008-05-28 EP EP08290490A patent/EP2037495B1/en active Active
- 2008-05-28 AT AT08290490T patent/ATE504083T1/de not_active IP Right Cessation
- 2008-05-28 DE DE602008005817T patent/DE602008005817D1/de active Active
- 2008-06-24 KR KR1020097024059A patent/KR101487371B1/ko active Active
- 2008-06-24 JP JP2010515370A patent/JP5099859B2/ja active Active
- 2008-06-24 CN CN2008800213829A patent/CN101689530B/zh active Active
- 2008-06-24 US US12/663,254 patent/US8324075B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001155978A (ja) * | 1999-11-29 | 2001-06-08 | Shin Etsu Handotai Co Ltd | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| JP2007116161A (ja) * | 2005-10-18 | 2007-05-10 | Soi Tec Silicon On Insulator Technologies | エピタキシ済みドナー・ウェファをリサイクルする方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US8324075B2 (en) | 2012-12-04 |
| CN101689530A (zh) | 2010-03-31 |
| DE602008005817D1 (de) | 2011-05-12 |
| EP2037495A1 (en) | 2009-03-18 |
| CN101689530B (zh) | 2013-05-22 |
| JP5099859B2 (ja) | 2012-12-19 |
| JP2010532928A (ja) | 2010-10-14 |
| EP2015354A1 (en) | 2009-01-14 |
| ATE504083T1 (de) | 2011-04-15 |
| KR20100044142A (ko) | 2010-04-29 |
| EP2037495B1 (en) | 2011-03-30 |
| US20100181653A1 (en) | 2010-07-22 |
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