FR2892228B1 - Procede de recyclage d'une plaquette donneuse epitaxiee - Google Patents

Procede de recyclage d'une plaquette donneuse epitaxiee

Info

Publication number
FR2892228B1
FR2892228B1 FR0510596A FR0510596A FR2892228B1 FR 2892228 B1 FR2892228 B1 FR 2892228B1 FR 0510596 A FR0510596 A FR 0510596A FR 0510596 A FR0510596 A FR 0510596A FR 2892228 B1 FR2892228 B1 FR 2892228B1
Authority
FR
France
Prior art keywords
epitaxy
recycling
donor plate
donor
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0510596A
Other languages
English (en)
Other versions
FR2892228A1 (fr
Inventor
Nabil Chhaimi
Eric Guiot
Patrick Reynaud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR0510596A priority Critical patent/FR2892228B1/fr
Priority to US11/386,967 priority patent/US20070087526A1/en
Priority to TW095136368A priority patent/TWI337769B/zh
Priority to EP06121833A priority patent/EP1777735A3/fr
Priority to SG200607051-0A priority patent/SG131874A1/en
Priority to KR1020060099717A priority patent/KR100840428B1/ko
Priority to CN2006101355317A priority patent/CN1959952B/zh
Priority to JP2006284086A priority patent/JP2007116161A/ja
Publication of FR2892228A1 publication Critical patent/FR2892228A1/fr
Application granted granted Critical
Publication of FR2892228B1 publication Critical patent/FR2892228B1/fr
Priority to US12/503,537 priority patent/US20090325362A1/en
Priority to US12/718,804 priority patent/US20100167500A1/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
FR0510596A 2003-01-07 2005-10-18 Procede de recyclage d'une plaquette donneuse epitaxiee Expired - Fee Related FR2892228B1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
FR0510596A FR2892228B1 (fr) 2005-10-18 2005-10-18 Procede de recyclage d'une plaquette donneuse epitaxiee
US11/386,967 US20070087526A1 (en) 2005-10-18 2006-03-21 Method of recycling an epitaxied donor wafer
TW095136368A TWI337769B (en) 2005-10-18 2006-09-29 Method for recycling an epitaxied donor wafer
EP06121833A EP1777735A3 (fr) 2005-10-18 2006-10-05 Procédé de recyclage d'une plaquette donneuse épitaxiée
SG200607051-0A SG131874A1 (en) 2005-10-18 2006-10-10 Method for recycling an epitaxied donor wafer
KR1020060099717A KR100840428B1 (ko) 2005-10-18 2006-10-13 에피탁시된 도너 웨이퍼 재활용 방법
CN2006101355317A CN1959952B (zh) 2005-10-18 2006-10-18 再循环外延施予晶片的方法
JP2006284086A JP2007116161A (ja) 2005-10-18 2006-10-18 エピタキシ済みドナー・ウェファをリサイクルする方法
US12/503,537 US20090325362A1 (en) 2003-01-07 2009-07-15 Method of recycling an epitaxied donor wafer
US12/718,804 US20100167500A1 (en) 2003-01-07 2010-03-05 Method of recycling an epitaxied donor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0510596A FR2892228B1 (fr) 2005-10-18 2005-10-18 Procede de recyclage d'une plaquette donneuse epitaxiee

Publications (2)

Publication Number Publication Date
FR2892228A1 FR2892228A1 (fr) 2007-04-20
FR2892228B1 true FR2892228B1 (fr) 2008-01-25

Family

ID=36661772

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0510596A Expired - Fee Related FR2892228B1 (fr) 2003-01-07 2005-10-18 Procede de recyclage d'une plaquette donneuse epitaxiee

Country Status (4)

Country Link
US (1) US20070087526A1 (fr)
CN (1) CN1959952B (fr)
FR (1) FR2892228B1 (fr)
TW (1) TWI337769B (fr)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2773261B1 (fr) 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
FR2868599B1 (fr) * 2004-03-30 2006-07-07 Soitec Silicon On Insulator Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur
FR2891281B1 (fr) * 2005-09-28 2007-12-28 Commissariat Energie Atomique Procede de fabrication d'un element en couches minces.
FR2917232B1 (fr) * 2007-06-06 2009-10-09 Soitec Silicon On Insulator Procede de fabrication d'une structure pour epitaxie sans zone d'exclusion.
EP2015354A1 (fr) * 2007-07-11 2009-01-14 S.O.I.Tec Silicon on Insulator Technologies Procédé pour le recyclage d'un substrat, procédé de fabrication de tranches stratifiées et substrat donneur recyclé approprié
WO2009007003A1 (fr) * 2007-07-11 2009-01-15 S.O.I. Tec Silicon On Insulator Technologies Procédé pour recycler un substrat, procédé de fabrication de tranches stratifiées et substrat donneur recyclé approprié
FR2922359B1 (fr) * 2007-10-12 2009-12-18 Commissariat Energie Atomique Procede de fabrication d'une structure micro-electronique impliquant un collage moleculaire
FR2929758B1 (fr) 2008-04-07 2011-02-11 Commissariat Energie Atomique Procede de transfert a l'aide d'un substrat ferroelectrique
EP2213415A1 (fr) * 2009-01-29 2010-08-04 S.O.I. TEC Silicon Dispositif pour le polissage du bord d'un substrat semi-conducteur
US8198172B2 (en) 2009-02-25 2012-06-12 Micron Technology, Inc. Methods of forming integrated circuits using donor and acceptor substrates
EP2246882B1 (fr) * 2009-04-29 2015-03-04 Soitec Procédé de transfert d'une couche à partir d'un substrat donneur sur un substrat de manipulation
FR2947098A1 (fr) * 2009-06-18 2010-12-24 Commissariat Energie Atomique Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince
US8187901B2 (en) 2009-12-07 2012-05-29 Micron Technology, Inc. Epitaxial formation support structures and associated methods
FR2999801B1 (fr) 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
WO2015084868A1 (fr) 2013-12-02 2015-06-11 The Regents Of The University Of Michigan Fabrication de dispositifs électroniques à film mince avec réutilisation non destructrice de plaquette
US20180033609A1 (en) * 2016-07-28 2018-02-01 QMAT, Inc. Removal of non-cleaved/non-transferred material from donor substrate
FR3055063B1 (fr) * 2016-08-11 2018-08-31 Soitec Procede de transfert d'une couche utile

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
JP3500063B2 (ja) * 1998-04-23 2004-02-23 信越半導体株式会社 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ
EP0995671A3 (fr) * 1998-10-22 2002-01-30 Christian Twisselmann Bateau avec deux coques
US6524935B1 (en) * 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
FR2823596B1 (fr) * 2001-04-13 2004-08-20 Commissariat Energie Atomique Substrat ou structure demontable et procede de realisation
KR100913557B1 (ko) * 2002-01-28 2009-08-21 미쓰비시 가가꾸 가부시키가이샤 반도체 디바이스용 기판의 세정액 및 세정방법
WO2003079415A2 (fr) * 2002-03-14 2003-09-25 Amberwave Systems Corporation Procedes de fabrication de couches contraintes sur des substrats semiconducteurs
US7008857B2 (en) * 2002-08-26 2006-03-07 S.O.I.Tec Silicon On Insulator Technologies S.A. Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
EP1588416B1 (fr) * 2003-01-07 2009-03-25 S.O.I.Tec Silicon on Insulator Technologies Recyclage d'une tranche comprenant une structure multicouches apres l'enlevement d'une couche mince
JP2004247610A (ja) * 2003-02-14 2004-09-02 Canon Inc 基板の製造方法
FR2855909B1 (fr) * 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat
FR2858462B1 (fr) * 2003-07-29 2005-12-09 Soitec Silicon On Insulator Procede d'obtention d'une couche mince de qualite accrue par co-implantation et recuit thermique
FR2867310B1 (fr) * 2004-03-05 2006-05-26 Soitec Silicon On Insulator Technique d'amelioration de la qualite d'une couche mince prelevee

Also Published As

Publication number Publication date
TWI337769B (en) 2011-02-21
FR2892228A1 (fr) 2007-04-20
TW200721373A (en) 2007-06-01
US20070087526A1 (en) 2007-04-19
CN1959952A (zh) 2007-05-09
CN1959952B (zh) 2010-11-10

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20120629