KR101380094B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR101380094B1
KR101380094B1 KR1020127011218A KR20127011218A KR101380094B1 KR 101380094 B1 KR101380094 B1 KR 101380094B1 KR 1020127011218 A KR1020127011218 A KR 1020127011218A KR 20127011218 A KR20127011218 A KR 20127011218A KR 101380094 B1 KR101380094 B1 KR 101380094B1
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South Korea
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plasma
oxide film
film
silicon
silicon dioxide
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Korean (ko)
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KR20120069754A (ko
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요시히로 사토
도시히코 시오자와
다츠오 니시타
요시히로 히로타
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도쿄엘렉트론가부시키가이샤
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/17Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
KR1020127011218A 2009-09-30 2010-09-29 반도체 장치의 제조 방법 Active KR101380094B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2009227638 2009-09-30
JPJP-P-2009-227638 2009-09-30
JPJP-P-2010-207773 2010-09-16
JP2010207773A JP2011097029A (ja) 2009-09-30 2010-09-16 半導体装置の製造方法
PCT/JP2010/066886 WO2011040426A1 (ja) 2009-09-30 2010-09-29 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20120069754A KR20120069754A (ko) 2012-06-28
KR101380094B1 true KR101380094B1 (ko) 2014-04-01

Family

ID=43826242

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Application Number Title Priority Date Filing Date
KR1020127011218A Active KR101380094B1 (ko) 2009-09-30 2010-09-29 반도체 장치의 제조 방법

Country Status (5)

Country Link
US (1) US20120184107A1 (https=)
JP (1) JP2011097029A (https=)
KR (1) KR101380094B1 (https=)
TW (1) TW201125071A (https=)
WO (1) WO2011040426A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5981206B2 (ja) * 2012-04-20 2016-08-31 株式会社東芝 半導体装置の製造方法および半導体製造装置
CN103258732B (zh) * 2013-05-07 2016-08-24 上海华力微电子有限公司 防止硅衬底表面损伤的方法
US9379132B2 (en) * 2014-10-24 2016-06-28 Sandisk Technologies Inc. NAND memory strings and methods of fabrication thereof
US20160172190A1 (en) * 2014-12-15 2016-06-16 United Microelectronics Corp. Gate oxide formation process
JP2016134614A (ja) * 2015-01-22 2016-07-25 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
WO2017171488A1 (ko) * 2016-03-31 2017-10-05 주식회사 엘지화학 배리어 필름의 제조 방법
EP3291008A1 (en) * 2016-09-06 2018-03-07 ASML Netherlands B.V. Method and apparatus to monitor a process apparatus
US10971357B2 (en) * 2018-10-04 2021-04-06 Applied Materials, Inc. Thin film treatment process
CN111627810B (zh) * 2020-06-05 2022-10-11 合肥晶合集成电路股份有限公司 一种半导体结构及其制造方法
KR102905650B1 (ko) * 2020-06-29 2025-12-30 어플라이드 머티어리얼스, 인코포레이티드 화학 기계적 연마를 위한 스팀 생성의 제어
KR102461496B1 (ko) * 2021-06-03 2022-11-03 주식회사 기가레인 기판 배치 유닛
KR102497494B1 (ko) * 2021-06-03 2023-02-08 주식회사 기가레인 기판 배치 유닛
CN116759325B (zh) * 2023-08-23 2023-11-03 江苏卓胜微电子股份有限公司 用于监控离子注入剂量的阻值监控方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060172488A1 (en) * 2005-01-12 2006-08-03 Sanyo Electric Co., Ltd. Semiconductor device manufacturing method
US20070243683A1 (en) * 2006-04-13 2007-10-18 Texas Instruments Incorporated A method for forming multi gate devices using a silicon oxide masking layer
KR20080102273A (ko) * 2006-08-28 2008-11-24 고쿠리츠 다이가쿠 호우징 나고야 다이가쿠 플라즈마 산화 처리 방법
US20090101284A1 (en) * 2007-03-26 2009-04-23 Tokyo Electron Limited Table for plasma processing apparatus and plasma processing apparatus

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3505493B2 (ja) * 1999-09-16 2004-03-08 松下電器産業株式会社 半導体装置の製造方法
JP2004153037A (ja) * 2002-10-31 2004-05-27 Renesas Technology Corp 半導体装置の製造方法
JP2005072358A (ja) * 2003-08-26 2005-03-17 Seiko Epson Corp 半導体装置の製造方法
JP4989076B2 (ja) * 2005-01-12 2012-08-01 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
JP4509864B2 (ja) * 2005-05-30 2010-07-21 東京エレクトロン株式会社 プラズマ処理方法およびプラズマ処理装置
JP2008053535A (ja) * 2006-08-25 2008-03-06 Toshiba Corp 半導体装置の製造方法及び不揮発性記憶装置の製造方法
JP5229711B2 (ja) * 2006-12-25 2013-07-03 国立大学法人名古屋大学 パターン形成方法、および半導体装置の製造方法
WO2009093760A1 (ja) * 2008-01-24 2009-07-30 Tokyo Electron Limited シリコン酸化膜の形成方法、記憶媒体、および、プラズマ処理装置
WO2009099252A1 (ja) * 2008-02-08 2009-08-13 Tokyo Electron Limited 絶縁膜のプラズマ改質処理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060172488A1 (en) * 2005-01-12 2006-08-03 Sanyo Electric Co., Ltd. Semiconductor device manufacturing method
US20070243683A1 (en) * 2006-04-13 2007-10-18 Texas Instruments Incorporated A method for forming multi gate devices using a silicon oxide masking layer
KR20080102273A (ko) * 2006-08-28 2008-11-24 고쿠리츠 다이가쿠 호우징 나고야 다이가쿠 플라즈마 산화 처리 방법
US20090101284A1 (en) * 2007-03-26 2009-04-23 Tokyo Electron Limited Table for plasma processing apparatus and plasma processing apparatus

Also Published As

Publication number Publication date
KR20120069754A (ko) 2012-06-28
JP2011097029A (ja) 2011-05-12
US20120184107A1 (en) 2012-07-19
WO2011040426A1 (ja) 2011-04-07
TW201125071A (en) 2011-07-16

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