KR101296960B1 - 기판 처리 방법 및 기판 처리 장치 - Google Patents

기판 처리 방법 및 기판 처리 장치 Download PDF

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Publication number
KR101296960B1
KR101296960B1 KR1020117023900A KR20117023900A KR101296960B1 KR 101296960 B1 KR101296960 B1 KR 101296960B1 KR 1020117023900 A KR1020117023900 A KR 1020117023900A KR 20117023900 A KR20117023900 A KR 20117023900A KR 101296960 B1 KR101296960 B1 KR 101296960B1
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South Korea
Prior art keywords
substrate
gas
temperature
processing
organic acid
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KR1020117023900A
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English (en)
Korean (ko)
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KR20110127268A (ko
Inventor
히데노리 미요시
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도쿄엘렉트론가부시키가이샤
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Publication of KR20110127268A publication Critical patent/KR20110127268A/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
KR1020117023900A 2009-03-19 2010-02-04 기판 처리 방법 및 기판 처리 장치 Expired - Fee Related KR101296960B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2009-067919 2009-03-19
JP2009067919A JP5161819B2 (ja) 2009-03-19 2009-03-19 基板処理方法および基板処理装置
PCT/JP2010/051597 WO2010106843A1 (ja) 2009-03-19 2010-02-04 基板処理方法および基板処理装置

Publications (2)

Publication Number Publication Date
KR20110127268A KR20110127268A (ko) 2011-11-24
KR101296960B1 true KR101296960B1 (ko) 2013-08-14

Family

ID=42739509

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117023900A Expired - Fee Related KR101296960B1 (ko) 2009-03-19 2010-02-04 기판 처리 방법 및 기판 처리 장치

Country Status (5)

Country Link
US (1) US20120006782A1 (enExample)
JP (1) JP5161819B2 (enExample)
KR (1) KR101296960B1 (enExample)
CN (1) CN102356453A (enExample)
WO (1) WO2010106843A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5395708B2 (ja) * 2010-03-09 2014-01-22 東京エレクトロン株式会社 基板の配線方法及び半導体製造装置
KR20150124953A (ko) * 2013-03-01 2015-11-06 도다 고교 가부시끼가이샤 도전성 도막의 제조 방법 및 도전성 도막
JP5800969B1 (ja) * 2014-08-27 2015-10-28 株式会社日立国際電気 基板処理装置、半導体装置の製造方法、プログラム、記録媒体
EP3061845B1 (en) * 2015-02-03 2018-12-12 LG Electronics Inc. Metal organic chemical vapor deposition apparatus for solar cell
CN111607801A (zh) * 2019-02-22 2020-09-01 中科院微电子研究所昆山分所 一种铜表面氧化物的处理方法
JP7341043B2 (ja) * 2019-12-06 2023-09-08 東京エレクトロン株式会社 基板処理方法及び基板処理装置
CN111088501B (zh) * 2019-12-16 2021-06-22 浙江大学 一种元素分析仪还原管的回收和再利用方法
JP7030858B2 (ja) * 2020-01-06 2022-03-07 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
JP7828857B2 (ja) * 2022-08-30 2026-03-12 株式会社アルバック 基板処理装置、基板処理システム、および基板処理方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080047583A1 (en) * 2005-01-06 2008-02-28 Akira Fukunaga Substrate Processing Method and Apparatus
KR20080038159A (ko) * 2006-06-26 2008-05-02 도쿄엘렉트론가부시키가이샤 기판 처리 방법 및 기판 처리 장치
JP2009043975A (ja) * 2007-08-09 2009-02-26 Tokyo Electron Ltd ドライクリーニング方法、基板処理装置、半導体装置の製造方法及び記憶媒体

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57170534A (en) * 1981-04-15 1982-10-20 Hitachi Ltd Dry etching method for aluminum and aluminum alloy
JPS63203772A (ja) * 1987-02-20 1988-08-23 Hitachi Ltd 銅薄膜の気相成長方法
US6899816B2 (en) * 2002-04-03 2005-05-31 Applied Materials, Inc. Electroless deposition method
US7205228B2 (en) * 2003-06-03 2007-04-17 Applied Materials, Inc. Selective metal encapsulation schemes
WO2005106936A1 (ja) * 2004-04-30 2005-11-10 Ebara Corporation 基板の処理装置
JP2006216937A (ja) * 2005-01-06 2006-08-17 Ebara Corp 基板処理方法及び装置
US20070054047A1 (en) * 2005-09-06 2007-03-08 Tokyo Electron Limited Method of forming a tantalum-containing layer from a metalorganic precursor
JP2009043974A (ja) * 2007-08-09 2009-02-26 Tokyo Electron Ltd 半導体装置の製造方法、半導体基板の処理装置及び記憶媒体

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080047583A1 (en) * 2005-01-06 2008-02-28 Akira Fukunaga Substrate Processing Method and Apparatus
KR20080038159A (ko) * 2006-06-26 2008-05-02 도쿄엘렉트론가부시키가이샤 기판 처리 방법 및 기판 처리 장치
JP2009043975A (ja) * 2007-08-09 2009-02-26 Tokyo Electron Ltd ドライクリーニング方法、基板処理装置、半導体装置の製造方法及び記憶媒体

Also Published As

Publication number Publication date
JP2010225614A (ja) 2010-10-07
WO2010106843A1 (ja) 2010-09-23
US20120006782A1 (en) 2012-01-12
CN102356453A (zh) 2012-02-15
JP5161819B2 (ja) 2013-03-13
KR20110127268A (ko) 2011-11-24

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