KR101203220B1 - 신호 전도를 허용하면서 인터커넥트 패드에 대한 구조적서포트를 제공하기 위한 방법 및 장치 - Google Patents

신호 전도를 허용하면서 인터커넥트 패드에 대한 구조적서포트를 제공하기 위한 방법 및 장치 Download PDF

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KR101203220B1
KR101203220B1 KR1020077015769A KR20077015769A KR101203220B1 KR 101203220 B1 KR101203220 B1 KR 101203220B1 KR 1020077015769 A KR1020077015769 A KR 1020077015769A KR 20077015769 A KR20077015769 A KR 20077015769A KR 101203220 B1 KR101203220 B1 KR 101203220B1
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metal
interconnect
layer
metal layer
interconnect pad
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KR20070099599A (ko
Inventor
케빈 제이. 헤스
수잔 에이치. 다우니
제임스 더블유. 밀러
쳉 초이 용
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프리스케일 세미컨덕터, 인크.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/4763—Deposition of non-insulating, e.g. conductive -, resistive -, layers on insulating layers; After-treatment of these layers
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
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    • H01L2924/19043—Component type being a resistor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Wire Bonding (AREA)
KR1020077015769A 2005-01-11 2005-11-30 신호 전도를 허용하면서 인터커넥트 패드에 대한 구조적서포트를 제공하기 위한 방법 및 장치 Expired - Lifetime KR101203220B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/033,008 US7241636B2 (en) 2005-01-11 2005-01-11 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
US11/033,008 2005-01-11
PCT/US2005/043207 WO2006076082A2 (en) 2005-01-11 2005-11-30 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance

Publications (2)

Publication Number Publication Date
KR20070099599A KR20070099599A (ko) 2007-10-09
KR101203220B1 true KR101203220B1 (ko) 2012-11-20

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KR1020077015769A Expired - Lifetime KR101203220B1 (ko) 2005-01-11 2005-11-30 신호 전도를 허용하면서 인터커넥트 패드에 대한 구조적서포트를 제공하기 위한 방법 및 장치

Country Status (6)

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US (2) US7241636B2 (enExample)
JP (1) JP2008527710A (enExample)
KR (1) KR101203220B1 (enExample)
CN (2) CN101556945B (enExample)
TW (1) TWI389226B (enExample)
WO (1) WO2006076082A2 (enExample)

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US7241636B2 (en) 2007-07-10
US7626276B2 (en) 2009-12-01
TWI389226B (zh) 2013-03-11
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WO2006076082A2 (en) 2006-07-20
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