KR101091551B1 - 웨이퍼의 동시 접합 및 상호접속을 위한 결합 - Google Patents

웨이퍼의 동시 접합 및 상호접속을 위한 결합 Download PDF

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KR101091551B1
KR101091551B1 KR1020110032044A KR20110032044A KR101091551B1 KR 101091551 B1 KR101091551 B1 KR 101091551B1 KR 1020110032044 A KR1020110032044 A KR 1020110032044A KR 20110032044 A KR20110032044 A KR 20110032044A KR 101091551 B1 KR101091551 B1 KR 101091551B1
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metal layer
microelectronic
major surface
metal
microelectronic element
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베이그 오가네시안
벨가셈 하바
일야스 모하메드
피유시 사발리아
크레이그 미셀
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테세라, 인코포레이티드
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
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    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
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    • H10W72/07231—Techniques
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    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
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    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
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    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
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    • H10W72/251—Materials
    • H10W72/255—Materials of outermost layers of multilayered bumps, e.g. material of a coating
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
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    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/322—Multilayered die-attach connectors, e.g. a coating on a top surface of a core
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    • H10W72/341—Dispositions of die-attach connectors, e.g. layouts
    • H10W72/342—Dispositions of die-attach connectors, e.g. layouts relative to the surface, e.g. recessed, protruding
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    • H10W72/853—On the same surface
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    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
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    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
KR1020110032044A 2010-12-20 2011-04-07 웨이퍼의 동시 접합 및 상호접속을 위한 결합 Expired - Fee Related KR101091551B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201061424906P 2010-12-20 2010-12-20
US61/424,906 2010-12-20

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KR1020110061826A Division KR20120069515A (ko) 2010-12-20 2011-06-24 웨이퍼의 동시 접합 및 상호접속을 위한 결합

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KR101091551B1 true KR101091551B1 (ko) 2011-12-13

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KR1020110032044A Expired - Fee Related KR101091551B1 (ko) 2010-12-20 2011-04-07 웨이퍼의 동시 접합 및 상호접속을 위한 결합
KR1020110061826A Withdrawn KR20120069515A (ko) 2010-12-20 2011-06-24 웨이퍼의 동시 접합 및 상호접속을 위한 결합

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Country Status (7)

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US (2) US8486758B2 (https=)
EP (1) EP2656383B1 (https=)
JP (1) JP5881734B2 (https=)
KR (2) KR101091551B1 (https=)
CN (1) CN103370784B (https=)
TW (1) TWI406383B (https=)
WO (1) WO2012087364A1 (https=)

Cited By (2)

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US9508704B2 (en) 2014-04-30 2016-11-29 Samsung Electronics Co., Ltd. Method of fabricating semiconductor package, semiconductor package formed thereby, and semiconductor device including the same
CN113496945A (zh) * 2020-03-20 2021-10-12 美商矽成积体电路股份有限公司 晶圆接合结构与其形成方法

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US9237648B2 (en) 2013-02-25 2016-01-12 Invensas Corporation Carrier-less silicon interposer
US9691693B2 (en) 2013-12-04 2017-06-27 Invensas Corporation Carrier-less silicon interposer using photo patterned polymer as substrate
CN104900543B (zh) * 2014-03-06 2018-02-06 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制备方法
US9704841B2 (en) * 2014-03-26 2017-07-11 United Microelectronics Corp. Method of packaging stacked dies on wafer using flip-chip bonding
CN105023877B (zh) 2014-04-28 2019-12-24 联华电子股份有限公司 半导体晶片、封装结构与其制作方法
US9437536B1 (en) 2015-05-08 2016-09-06 Invensas Corporation Reversed build-up substrate for 2.5D
TWI645479B (zh) 2015-05-13 2018-12-21 財團法人工業技術研究院 貼合結構、其製造方法及晶粒結構
US10211160B2 (en) 2015-09-08 2019-02-19 Invensas Corporation Microelectronic assembly with redistribution structure formed on carrier
US9666560B1 (en) 2015-11-25 2017-05-30 Invensas Corporation Multi-chip microelectronic assembly with built-up fine-patterned circuit structure
US9691747B1 (en) 2015-12-21 2017-06-27 International Business Machines Corporation Manufacture of wafer—panel die package assembly technology
TWI607587B (zh) * 2016-09-13 2017-12-01 台灣琭旦股份有限公司 固晶穩固製程
US10283445B2 (en) 2016-10-26 2019-05-07 Invensas Corporation Bonding of laminates with electrical interconnects
CN111115555B (zh) * 2019-12-20 2023-08-29 北京航天控制仪器研究所 一种用于mems晶圆级共晶键合封装的硅槽结构及制备方法
CN111179612B (zh) * 2019-12-27 2021-09-07 讯飞智元信息科技有限公司 交叉口车道功能生成方法、装置和设备
US11270963B2 (en) 2020-01-14 2022-03-08 Sandisk Technologies Llc Bonding pads including interfacial electromigration barrier layers and methods of making the same
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US20130341804A1 (en) 2013-12-26
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