KR101038992B1 - 비휘발성 반도체 메모리 회로 - Google Patents

비휘발성 반도체 메모리 회로 Download PDF

Info

Publication number
KR101038992B1
KR101038992B1 KR1020090032315A KR20090032315A KR101038992B1 KR 101038992 B1 KR101038992 B1 KR 101038992B1 KR 1020090032315 A KR1020090032315 A KR 1020090032315A KR 20090032315 A KR20090032315 A KR 20090032315A KR 101038992 B1 KR101038992 B1 KR 101038992B1
Authority
KR
South Korea
Prior art keywords
data
voltage
level
delete delete
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020090032315A
Other languages
English (en)
Korean (ko)
Other versions
KR20100113804A (ko
Inventor
신윤재
김동근
Original Assignee
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020090032315A priority Critical patent/KR101038992B1/ko
Priority to US12/494,555 priority patent/US8194473B2/en
Priority to TW098124578A priority patent/TWI420525B/zh
Priority to JP2009175725A priority patent/JP2010250920A/ja
Publication of KR20100113804A publication Critical patent/KR20100113804A/ko
Application granted granted Critical
Publication of KR101038992B1 publication Critical patent/KR101038992B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0064—Verifying circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
KR1020090032315A 2009-04-14 2009-04-14 비휘발성 반도체 메모리 회로 Active KR101038992B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020090032315A KR101038992B1 (ko) 2009-04-14 2009-04-14 비휘발성 반도체 메모리 회로
US12/494,555 US8194473B2 (en) 2009-04-14 2009-06-30 Non-volatile semiconductor memory circuit
TW098124578A TWI420525B (zh) 2009-04-14 2009-07-21 非揮發性半導體記憶體電路
JP2009175725A JP2010250920A (ja) 2009-04-14 2009-07-28 不揮発性半導体メモリ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090032315A KR101038992B1 (ko) 2009-04-14 2009-04-14 비휘발성 반도체 메모리 회로

Publications (2)

Publication Number Publication Date
KR20100113804A KR20100113804A (ko) 2010-10-22
KR101038992B1 true KR101038992B1 (ko) 2011-06-03

Family

ID=42934267

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090032315A Active KR101038992B1 (ko) 2009-04-14 2009-04-14 비휘발성 반도체 메모리 회로

Country Status (4)

Country Link
US (1) US8194473B2 (enExample)
JP (1) JP2010250920A (enExample)
KR (1) KR101038992B1 (enExample)
TW (1) TWI420525B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8988929B2 (en) 2012-12-26 2015-03-24 Samsung Electronics Co., Ltd. Nonvolatile memory device and related operating method

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101080209B1 (ko) * 2010-09-30 2011-11-07 주식회사 하이닉스반도체 반도체 장치
US8331164B2 (en) * 2010-12-06 2012-12-11 International Business Machines Corporation Compact low-power asynchronous resistor-based memory read operation and circuit
KR101813175B1 (ko) * 2011-02-21 2017-12-29 삼성전자주식회사 논리 회로, 상기 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법
KR20130104287A (ko) * 2012-03-13 2013-09-25 삼성전자주식회사 센싱 검증부를 포함하는 반도체 메모리 장치
KR20140028481A (ko) * 2012-08-29 2014-03-10 에스케이하이닉스 주식회사 쓰기 전류를 측정할 수 있는 반도체 메모리 장치 및 쓰기 전류 측정 방법
KR102079370B1 (ko) 2013-02-05 2020-02-20 삼성전자주식회사 비휘발성 메모리 장치 및 그것의 쓰기 방법
JP6370444B1 (ja) * 2017-06-20 2018-08-08 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
US10832765B2 (en) * 2018-06-29 2020-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Variation tolerant read assist circuit for SRAM
KR102651128B1 (ko) 2018-12-11 2024-03-26 삼성전자주식회사 데이터 비교 기록을 수행하는 메모리 장치 및 이를 포함하는 메모리 시스템

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100764738B1 (ko) * 2006-04-06 2007-10-09 삼성전자주식회사 향상된 신뢰성을 갖는 상변화 메모리 장치, 그것의 쓰기방법, 그리고 그것을 포함한 시스템
KR20080062714A (ko) * 2006-12-29 2008-07-03 주식회사 하이닉스반도체 입력 버퍼 회로

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3344313B2 (ja) * 1998-03-25 2002-11-11 日本電気株式会社 不揮発性半導体メモリ装置
JP2000076874A (ja) * 1998-08-27 2000-03-14 Hitachi Ltd 不揮発性半導体記憶装置
JP3781240B2 (ja) * 1998-09-07 2006-05-31 株式会社ルネサステクノロジ 不揮発性半導体メモリおよびそれを内蔵した半導体集積回路
JP2000268593A (ja) * 1999-03-18 2000-09-29 Matsushita Electric Ind Co Ltd 不揮発性半導体メモリ
JP2004055073A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置および不揮発性半導体記憶装置の検査方法
KR100543442B1 (ko) * 2002-09-06 2006-01-23 삼성전자주식회사 불 휘발성 반도체 메모리 장치의 메모리 블록들의 쓰기방지 영역을 설정하는 장치
JP2004234739A (ja) * 2003-01-29 2004-08-19 Renesas Technology Corp 不揮発性半導体記憶装置
JP4867297B2 (ja) * 2005-11-08 2012-02-01 ソニー株式会社 記憶装置のベリファイ方法
KR100801082B1 (ko) * 2006-11-29 2008-02-05 삼성전자주식회사 멀티 레벨 가변 저항 메모리 장치의 구동 방법 및 멀티레벨 가변 저항 메모리 장치
KR101367659B1 (ko) * 2007-07-12 2014-02-25 삼성전자주식회사 읽기 에러를 줄일 수 있는 멀티 레벨 상 변화 메모리 장치및 그것의 읽기 방법
KR20090016195A (ko) 2007-08-10 2009-02-13 주식회사 하이닉스반도체 상 변화 메모리 장치
KR100895387B1 (ko) 2007-10-16 2009-04-30 주식회사 하이닉스반도체 상 변화 메모리 장치
KR20090126587A (ko) * 2008-06-04 2009-12-09 삼성전자주식회사 상 변화 메모리 장치 및 그것의 읽기 방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100764738B1 (ko) * 2006-04-06 2007-10-09 삼성전자주식회사 향상된 신뢰성을 갖는 상변화 메모리 장치, 그것의 쓰기방법, 그리고 그것을 포함한 시스템
KR20080062714A (ko) * 2006-12-29 2008-07-03 주식회사 하이닉스반도체 입력 버퍼 회로

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8988929B2 (en) 2012-12-26 2015-03-24 Samsung Electronics Co., Ltd. Nonvolatile memory device and related operating method

Also Published As

Publication number Publication date
US8194473B2 (en) 2012-06-05
KR20100113804A (ko) 2010-10-22
TWI420525B (zh) 2013-12-21
JP2010250920A (ja) 2010-11-04
TW201037709A (en) 2010-10-16
US20100259974A1 (en) 2010-10-14

Similar Documents

Publication Publication Date Title
KR101038992B1 (ko) 비휘발성 반도체 메모리 회로
US8315113B2 (en) Non-volatile semiconductor memory circuit with improved resistance distribution
KR100809334B1 (ko) 상변화 메모리 장치
US8559256B2 (en) Non-volatile memory device and sensing method thereof
KR100541816B1 (ko) 반도체 메모리에서의 데이터 리드 회로 및 데이터 리드 방법
CN101180683B (zh) 半导体器件
KR20090123244A (ko) 상 변화 메모리 장치 및 그것의 쓰기 방법
US20100214819A1 (en) Resistive memory devices, memory systems and methods of controlling input and output operations of the same
US8665655B2 (en) Non-volatile memory device and sensing method thereof
JPWO2016072173A1 (ja) 不揮発性メモリ装置、および不揮発性メモリ装置の制御方法
KR101095736B1 (ko) 비휘발성 메모리 장치
US8264873B2 (en) Non-volatile semiconductor memory circuit and method of controlling the same
JP4786948B2 (ja) プログラミング方法、相変化メモリ装置、及び、相変化メモリ書込み動作の駆動回路
US8520423B2 (en) Non-volatile memory device
US7499344B2 (en) Integrated circuit memory having a read circuit
WO2018212082A1 (ja) メモリ装置およびメモリ装置の制御方法
KR100944322B1 (ko) 상 변화 메모리 장치
KR100934853B1 (ko) 상 변화 메모리 장치
KR101194896B1 (ko) 비휘발성 메모리 장치
KR100895398B1 (ko) 상 변화 메모리 장치
KR100895397B1 (ko) 상 변화 메모리 장치
KR20100008624A (ko) 상 변화 메모리 장치 및 제어 방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20090414

PA0201 Request for examination
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20101014

Patent event code: PE09021S01D

PG1501 Laying open of application
E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20110429

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20110530

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20110531

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
FPAY Annual fee payment

Payment date: 20140423

Year of fee payment: 4

PR1001 Payment of annual fee

Payment date: 20140423

Start annual number: 4

End annual number: 4

FPAY Annual fee payment
PR1001 Payment of annual fee
FPAY Annual fee payment

Payment date: 20160422

Year of fee payment: 6

PR1001 Payment of annual fee

Payment date: 20160422

Start annual number: 6

End annual number: 6

FPAY Annual fee payment

Payment date: 20170425

Year of fee payment: 7

PR1001 Payment of annual fee

Payment date: 20170425

Start annual number: 7

End annual number: 7

FPAY Annual fee payment

Payment date: 20180425

Year of fee payment: 8

PR1001 Payment of annual fee

Payment date: 20180425

Start annual number: 8

End annual number: 8

FPAY Annual fee payment

Payment date: 20190422

Year of fee payment: 9

PR1001 Payment of annual fee

Payment date: 20190422

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20200424

Start annual number: 10

End annual number: 10

PR1001 Payment of annual fee

Payment date: 20220426

Start annual number: 12

End annual number: 12

PR1001 Payment of annual fee

Payment date: 20230425

Start annual number: 13

End annual number: 13