KR101023034B1 - 절연체상 실리콘 구조 및 방법 - Google Patents

절연체상 실리콘 구조 및 방법 Download PDF

Info

Publication number
KR101023034B1
KR101023034B1 KR1020047017791A KR20047017791A KR101023034B1 KR 101023034 B1 KR101023034 B1 KR 101023034B1 KR 1020047017791 A KR1020047017791 A KR 1020047017791A KR 20047017791 A KR20047017791 A KR 20047017791A KR 101023034 B1 KR101023034 B1 KR 101023034B1
Authority
KR
South Korea
Prior art keywords
insulator
layer
semiconductor
epitaxial
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1020047017791A
Other languages
English (en)
Korean (ko)
Other versions
KR20050007472A (ko
Inventor
크리스워크호벤
이보라이즈마커
찬탈아레나
Original Assignee
에이에스엠 아메리카, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에이에스엠 아메리카, 인코포레이티드 filed Critical 에이에스엠 아메리카, 인코포레이티드
Publication of KR20050007472A publication Critical patent/KR20050007472A/ko
Application granted granted Critical
Publication of KR101023034B1 publication Critical patent/KR101023034B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02192Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02194Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/0251Graded layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02513Microstructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76262Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using selective deposition of single crystal silicon, i.e. SEG techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
KR1020047017791A 2002-05-07 2003-05-07 절연체상 실리콘 구조 및 방법 Expired - Lifetime KR101023034B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US37886802P 2002-05-07 2002-05-07
US60/378,868 2002-05-07
US45501803P 2003-03-12 2003-03-12
US60/455,018 2003-03-12
PCT/US2003/014314 WO2003096385A2 (en) 2002-05-07 2003-05-07 Silicon-on-insulator structures and methods

Publications (2)

Publication Number Publication Date
KR20050007472A KR20050007472A (ko) 2005-01-18
KR101023034B1 true KR101023034B1 (ko) 2011-03-24

Family

ID=29423648

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020047017791A Expired - Lifetime KR101023034B1 (ko) 2002-05-07 2003-05-07 절연체상 실리콘 구조 및 방법

Country Status (5)

Country Link
US (1) US7452757B2 (enExample)
EP (1) EP1502285A2 (enExample)
JP (1) JP4951202B2 (enExample)
KR (1) KR101023034B1 (enExample)
WO (1) WO2003096385A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102871969B1 (ko) 2024-05-14 2025-10-15 연세대학교 산학협력단 결정성 채널층을 포함하는 반도체 소자 및 이의 제조방법

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7192888B1 (en) * 2000-08-21 2007-03-20 Micron Technology, Inc. Low selectivity deposition methods
US6921702B2 (en) 2002-07-30 2005-07-26 Micron Technology Inc. Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics
US7682947B2 (en) * 2003-03-13 2010-03-23 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
US7238595B2 (en) * 2003-03-13 2007-07-03 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
KR20060056331A (ko) * 2003-07-23 2006-05-24 에이에스엠 아메리카, 인코포레이티드 절연체-상-실리콘 구조 및 벌크 기판 상의 SiGe 증착
WO2005013326A2 (en) * 2003-07-30 2005-02-10 Asm America, Inc. Epitaxial growth of relaxed silicon germanium layers
US7601649B2 (en) 2004-08-02 2009-10-13 Micron Technology, Inc. Zirconium-doped tantalum oxide films
US7081421B2 (en) 2004-08-26 2006-07-25 Micron Technology, Inc. Lanthanide oxide dielectric layer
US7235501B2 (en) 2004-12-13 2007-06-26 Micron Technology, Inc. Lanthanum hafnium oxide dielectrics
US7662729B2 (en) 2005-04-28 2010-02-16 Micron Technology, Inc. Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer
KR100676201B1 (ko) * 2005-05-24 2007-01-30 삼성전자주식회사 원자층 적층법을 이용한 반도체 디바이스 제조방법
US7572695B2 (en) 2005-05-27 2009-08-11 Micron Technology, Inc. Hafnium titanium oxide films
JP2006344865A (ja) * 2005-06-10 2006-12-21 Toyoko Kagaku Co Ltd Soi基板及び該基板の製造方法
US7972974B2 (en) 2006-01-10 2011-07-05 Micron Technology, Inc. Gallium lanthanide oxide films
US7901968B2 (en) * 2006-03-23 2011-03-08 Asm America, Inc. Heteroepitaxial deposition over an oxidized surface
KR100774818B1 (ko) * 2006-08-22 2007-11-07 동부일렉트로닉스 주식회사 Soi기판
EP1975988B1 (en) * 2007-03-28 2015-02-25 Siltronic AG Multilayered semiconductor wafer and process for its production
JP5496540B2 (ja) * 2008-04-24 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
US8765508B2 (en) 2008-08-27 2014-07-01 Soitec Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters
WO2011061580A1 (en) 2009-11-18 2011-05-26 S.O.I.Tec Silicon On Insulator Technologies Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods
US8592294B2 (en) 2010-02-22 2013-11-26 Asm International N.V. High temperature atomic layer deposition of dielectric oxides
US9608119B2 (en) 2010-03-02 2017-03-28 Micron Technology, Inc. Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures
US8507966B2 (en) 2010-03-02 2013-08-13 Micron Technology, Inc. Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same
US9646869B2 (en) 2010-03-02 2017-05-09 Micron Technology, Inc. Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices
US8288795B2 (en) 2010-03-02 2012-10-16 Micron Technology, Inc. Thyristor based memory cells, devices and systems including the same and methods for forming the same
DE102010035489A1 (de) * 2010-08-26 2012-03-01 Osram Opto Semiconductors Gmbh Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelement
US9023721B2 (en) 2010-11-23 2015-05-05 Soitec Methods of forming bulk III-nitride materials on metal-nitride growth template layers, and structures formed by such methods
FR2968830B1 (fr) 2010-12-08 2014-03-21 Soitec Silicon On Insulator Couches matricielles ameliorees pour le depot heteroepitaxial de materiaux semiconducteurs de nitrure iii en utilisant des procedes hvpe
FR2968678B1 (fr) 2010-12-08 2015-11-20 Soitec Silicon On Insulator Procédés pour former des matériaux a base de nitrure du groupe iii et structures formées par ces procédés
US8753942B2 (en) 2010-12-01 2014-06-17 Intel Corporation Silicon and silicon germanium nanowire structures
US8952418B2 (en) 2011-03-01 2015-02-10 Micron Technology, Inc. Gated bipolar junction transistors
US8519431B2 (en) 2011-03-08 2013-08-27 Micron Technology, Inc. Thyristors
JP5802436B2 (ja) * 2011-05-30 2015-10-28 信越半導体株式会社 貼り合わせウェーハの製造方法
US9105469B2 (en) 2011-06-30 2015-08-11 Piquant Research Llc Defect mitigation structures for semiconductor devices
US9127345B2 (en) 2012-03-06 2015-09-08 Asm America, Inc. Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent
US9171715B2 (en) 2012-09-05 2015-10-27 Asm Ip Holding B.V. Atomic layer deposition of GeO2
CN102916039B (zh) * 2012-10-19 2016-01-20 清华大学 具有氧化铍的半导体结构
US9218963B2 (en) 2013-12-19 2015-12-22 Asm Ip Holding B.V. Cyclical deposition of germanium
WO2017019096A1 (en) * 2015-07-30 2017-02-02 Halliburton Energy Services, Inc. Integrated computational elements incorporating a stress relief layer
KR102514785B1 (ko) * 2017-05-19 2023-03-29 상라오 징코 솔라 테크놀러지 디벨롭먼트 컴퍼니, 리미티드 태양 전지 및 이의 제조 방법
US12006570B2 (en) * 2017-08-31 2024-06-11 Uchicago Argonne, Llc Atomic layer deposition for continuous, high-speed thin films

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159413A (en) * 1990-04-20 1992-10-27 Eaton Corporation Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate
US5478653A (en) * 1994-04-04 1995-12-26 Guenzer; Charles S. Bismuth titanate as a template layer for growth of crystallographically oriented silicon
JP2001102555A (ja) 1999-09-30 2001-04-13 Seiko Epson Corp 半導体装置、薄膜トランジスタ及びそれらの製造方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199773A (en) * 1978-08-29 1980-04-22 Rca Corporation Insulated gate field effect silicon-on-sapphire transistor and method of making same
JPS60202952A (ja) * 1984-03-28 1985-10-14 Fujitsu Ltd 半導体装置の製造方法
JPH0618174B2 (ja) * 1986-07-08 1994-03-09 シャープ株式会社 半導体基板
JPS63305529A (ja) * 1987-06-05 1988-12-13 Nippon Telegr & Teleph Corp <Ntt> 基板およびその製造方法
JPS6436046A (en) * 1987-07-31 1989-02-07 Seiko Epson Corp Manufacture of semiconductor device
US4935382A (en) * 1987-10-30 1990-06-19 American Telephone And Telegraph Company Method of making a semiconductor-insulator-semiconductor structure
US5256550A (en) * 1988-11-29 1993-10-26 Hewlett-Packard Company Fabricating a semiconductor device with strained Si1-x Gex layer
US5310696A (en) * 1989-06-16 1994-05-10 Massachusetts Institute Of Technology Chemical method for the modification of a substrate surface to accomplish heteroepitaxial crystal growth
JPH03109299A (ja) * 1989-09-22 1991-05-09 Nippon Telegr & Teleph Corp <Ntt> 多結晶シリコン膜の形成方法
EP0568064B1 (en) * 1992-05-01 1999-07-14 Texas Instruments Incorporated Pb/Bi-containing high-dielectric constant oxides using a non-Pb/Bi-containing perovskite as a buffer layer
JPH10144607A (ja) * 1996-11-13 1998-05-29 Hitachi Ltd 半導体基板およびその製造方法ならびにそれを用いた半導体装置およびその製造方法
JPH10265948A (ja) * 1997-03-25 1998-10-06 Rohm Co Ltd 半導体装置用基板およびその製法
CA2232796C (en) * 1997-03-26 2002-01-22 Canon Kabushiki Kaisha Thin film forming process
JPH11233440A (ja) * 1998-02-13 1999-08-27 Toshiba Corp 半導体装置
JP4439020B2 (ja) * 1998-03-26 2010-03-24 株式会社東芝 半導体記憶装置及びその製造方法
US6346732B1 (en) * 1999-05-14 2002-02-12 Kabushiki Kaisha Toshiba Semiconductor device with oxide mediated epitaxial layer
US6437375B1 (en) * 2000-06-05 2002-08-20 Micron Technology, Inc. PD-SOI substrate with suppressed floating body effect and method for its fabrication
US6583034B2 (en) * 2000-11-22 2003-06-24 Motorola, Inc. Semiconductor structure including a compliant substrate having a graded monocrystalline layer and methods for fabricating the structure and semiconductor devices including the structure
US6933566B2 (en) * 2001-07-05 2005-08-23 International Business Machines Corporation Method of forming lattice-matched structure on silicon and structure formed thereby
US6693298B2 (en) * 2001-07-20 2004-02-17 Motorola, Inc. Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same
US6515335B1 (en) * 2002-01-04 2003-02-04 International Business Machines Corporation Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159413A (en) * 1990-04-20 1992-10-27 Eaton Corporation Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate
US5478653A (en) * 1994-04-04 1995-12-26 Guenzer; Charles S. Bismuth titanate as a template layer for growth of crystallographically oriented silicon
JP2001102555A (ja) 1999-09-30 2001-04-13 Seiko Epson Corp 半導体装置、薄膜トランジスタ及びそれらの製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102871969B1 (ko) 2024-05-14 2025-10-15 연세대학교 산학협력단 결정성 채널층을 포함하는 반도체 소자 및 이의 제조방법

Also Published As

Publication number Publication date
EP1502285A2 (en) 2005-02-02
JP4951202B2 (ja) 2012-06-13
KR20050007472A (ko) 2005-01-18
US7452757B2 (en) 2008-11-18
US20040097022A1 (en) 2004-05-20
WO2003096385A3 (en) 2004-07-29
WO2003096385A2 (en) 2003-11-20
JP2005524987A (ja) 2005-08-18

Similar Documents

Publication Publication Date Title
KR101023034B1 (ko) 절연체상 실리콘 구조 및 방법
US5760426A (en) Heteroepitaxial semiconductor device including silicon substrate, GaAs layer and GaN layer #13
US6709989B2 (en) Method for fabricating a semiconductor structure including a metal oxide interface with silicon
El-Kareh et al. Fundamentals of semiconductor processing technology
KR100832415B1 (ko) 유전 접합막의 나노적층판 구조, 유전 접합막을 이용한 집적회로 및 콘덴서 구조, 및 그 형성 방법
US6270568B1 (en) Method for fabricating a semiconductor structure with reduced leakage current density
US6906400B2 (en) SiGe strain relaxed buffer for high mobility devices and a method of fabricating it
US8278176B2 (en) Selective epitaxial formation of semiconductor films
US7537804B2 (en) ALD methods in which two or more different precursors are utilized with one or more reactants to form materials over substrates
EP1096042A1 (en) Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US7550370B2 (en) Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density
US6933566B2 (en) Method of forming lattice-matched structure on silicon and structure formed thereby
CA1297390C (en) Method of epitaxially growing gallium arsenide on silicon
KR20140111971A (ko) AlzGa1-zN 층을 갖는 반도체 웨이퍼 및 이를 제조하는 방법
JPH0794506A (ja) 半導体装置の製造方法
JPH0513342A (ja) 半導体ダイヤモンド
JP7330189B2 (ja) シリコン基板上に炭化ケイ素を形成するための方法
Kim et al. Formation of β‐SiC at the interface between an epitaxial Si layer grown by rapid thermal chemical vapor deposition and a Si substrate
EP0562273B1 (en) Method for improving the interface characteristics of CaF2 on silicon
US7169619B2 (en) Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process
US5438951A (en) Method of growing compound semiconductor on silicon wafer
KR100594626B1 (ko) 원자층 증착법을 이용한 질화막의 형성 방법
JP3538634B2 (ja) 半導体素子用基板、半導体素子の製造方法及び半導体素子
JP2003528443A5 (enExample)
KR102399813B1 (ko) 탄화규소 에피 웨이퍼 및 그 제조방법

Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20041105

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
A201 Request for examination
AMND Amendment
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20080507

Comment text: Request for Examination of Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20100223

Patent event code: PE09021S01D

AMND Amendment
E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 20101007

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 20100223

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I

AMND Amendment
J201 Request for trial against refusal decision
PJ0201 Trial against decision of rejection

Patent event date: 20101018

Comment text: Request for Trial against Decision on Refusal

Patent event code: PJ02012R01D

Patent event date: 20101007

Comment text: Decision to Refuse Application

Patent event code: PJ02011S01I

Appeal kind category: Appeal against decision to decline refusal

Decision date: 20101210

Appeal identifier: 2010101008024

Request date: 20101018

PB0901 Examination by re-examination before a trial

Comment text: Amendment to Specification, etc.

Patent event date: 20101018

Patent event code: PB09011R02I

Comment text: Request for Trial against Decision on Refusal

Patent event date: 20101018

Patent event code: PB09011R01I

Comment text: Amendment to Specification, etc.

Patent event date: 20100622

Patent event code: PB09011R02I

Comment text: Amendment to Specification, etc.

Patent event date: 20080507

Patent event code: PB09011R02I

B701 Decision to grant
PB0701 Decision of registration after re-examination before a trial

Patent event date: 20101210

Comment text: Decision to Grant Registration

Patent event code: PB07012S01D

Patent event date: 20101119

Comment text: Transfer of Trial File for Re-examination before a Trial

Patent event code: PB07011S01I

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20110310

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20110311

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
FPAY Annual fee payment

Payment date: 20140221

Year of fee payment: 4

PR1001 Payment of annual fee

Payment date: 20140221

Start annual number: 4

End annual number: 4

FPAY Annual fee payment

Payment date: 20150224

Year of fee payment: 5

PR1001 Payment of annual fee

Payment date: 20150224

Start annual number: 5

End annual number: 5

FPAY Annual fee payment

Payment date: 20160218

Year of fee payment: 6

PR1001 Payment of annual fee

Payment date: 20160218

Start annual number: 6

End annual number: 6

FPAY Annual fee payment

Payment date: 20170220

Year of fee payment: 7

PR1001 Payment of annual fee

Payment date: 20170220

Start annual number: 7

End annual number: 7

FPAY Annual fee payment

Payment date: 20180219

Year of fee payment: 8

PR1001 Payment of annual fee

Payment date: 20180219

Start annual number: 8

End annual number: 8

FPAY Annual fee payment

Payment date: 20200218

Year of fee payment: 10

PR1001 Payment of annual fee

Payment date: 20200218

Start annual number: 10

End annual number: 10

PC1801 Expiration of term

Termination date: 20231107

Termination category: Expiration of duration