KR101023034B1 - 절연체상 실리콘 구조 및 방법 - Google Patents
절연체상 실리콘 구조 및 방법 Download PDFInfo
- Publication number
- KR101023034B1 KR101023034B1 KR1020047017791A KR20047017791A KR101023034B1 KR 101023034 B1 KR101023034 B1 KR 101023034B1 KR 1020047017791 A KR1020047017791 A KR 1020047017791A KR 20047017791 A KR20047017791 A KR 20047017791A KR 101023034 B1 KR101023034 B1 KR 101023034B1
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- South Korea
- Prior art keywords
- insulator
- layer
- semiconductor
- epitaxial
- forming
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02192—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
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- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
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- H01L21/02502—Layer structure consisting of two layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
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- H01L21/02494—Structure
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- H01L21/0251—Graded layers
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- H01L21/02494—Structure
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
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- H01L21/02532—Silicon, silicon germanium, germanium
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76262—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using selective deposition of single crystal silicon, i.e. SEG techniques
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US37886802P | 2002-05-07 | 2002-05-07 | |
| US60/378,868 | 2002-05-07 | ||
| US45501803P | 2003-03-12 | 2003-03-12 | |
| US60/455,018 | 2003-03-12 | ||
| PCT/US2003/014314 WO2003096385A2 (en) | 2002-05-07 | 2003-05-07 | Silicon-on-insulator structures and methods |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20050007472A KR20050007472A (ko) | 2005-01-18 |
| KR101023034B1 true KR101023034B1 (ko) | 2011-03-24 |
Family
ID=29423648
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020047017791A Expired - Lifetime KR101023034B1 (ko) | 2002-05-07 | 2003-05-07 | 절연체상 실리콘 구조 및 방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7452757B2 (enExample) |
| EP (1) | EP1502285A2 (enExample) |
| JP (1) | JP4951202B2 (enExample) |
| KR (1) | KR101023034B1 (enExample) |
| WO (1) | WO2003096385A2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102871969B1 (ko) | 2024-05-14 | 2025-10-15 | 연세대학교 산학협력단 | 결정성 채널층을 포함하는 반도체 소자 및 이의 제조방법 |
Families Citing this family (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7192888B1 (en) * | 2000-08-21 | 2007-03-20 | Micron Technology, Inc. | Low selectivity deposition methods |
| US6921702B2 (en) | 2002-07-30 | 2005-07-26 | Micron Technology Inc. | Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics |
| US7682947B2 (en) * | 2003-03-13 | 2010-03-23 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
| US7238595B2 (en) * | 2003-03-13 | 2007-07-03 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
| KR20060056331A (ko) * | 2003-07-23 | 2006-05-24 | 에이에스엠 아메리카, 인코포레이티드 | 절연체-상-실리콘 구조 및 벌크 기판 상의 SiGe 증착 |
| WO2005013326A2 (en) * | 2003-07-30 | 2005-02-10 | Asm America, Inc. | Epitaxial growth of relaxed silicon germanium layers |
| US7601649B2 (en) | 2004-08-02 | 2009-10-13 | Micron Technology, Inc. | Zirconium-doped tantalum oxide films |
| US7081421B2 (en) | 2004-08-26 | 2006-07-25 | Micron Technology, Inc. | Lanthanide oxide dielectric layer |
| US7235501B2 (en) | 2004-12-13 | 2007-06-26 | Micron Technology, Inc. | Lanthanum hafnium oxide dielectrics |
| US7662729B2 (en) | 2005-04-28 | 2010-02-16 | Micron Technology, Inc. | Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer |
| KR100676201B1 (ko) * | 2005-05-24 | 2007-01-30 | 삼성전자주식회사 | 원자층 적층법을 이용한 반도체 디바이스 제조방법 |
| US7572695B2 (en) | 2005-05-27 | 2009-08-11 | Micron Technology, Inc. | Hafnium titanium oxide films |
| JP2006344865A (ja) * | 2005-06-10 | 2006-12-21 | Toyoko Kagaku Co Ltd | Soi基板及び該基板の製造方法 |
| US7972974B2 (en) | 2006-01-10 | 2011-07-05 | Micron Technology, Inc. | Gallium lanthanide oxide films |
| US7901968B2 (en) * | 2006-03-23 | 2011-03-08 | Asm America, Inc. | Heteroepitaxial deposition over an oxidized surface |
| KR100774818B1 (ko) * | 2006-08-22 | 2007-11-07 | 동부일렉트로닉스 주식회사 | Soi기판 |
| EP1975988B1 (en) * | 2007-03-28 | 2015-02-25 | Siltronic AG | Multilayered semiconductor wafer and process for its production |
| JP5496540B2 (ja) * | 2008-04-24 | 2014-05-21 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
| US8765508B2 (en) | 2008-08-27 | 2014-07-01 | Soitec | Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters |
| WO2011061580A1 (en) | 2009-11-18 | 2011-05-26 | S.O.I.Tec Silicon On Insulator Technologies | Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods |
| US8592294B2 (en) | 2010-02-22 | 2013-11-26 | Asm International N.V. | High temperature atomic layer deposition of dielectric oxides |
| US9608119B2 (en) | 2010-03-02 | 2017-03-28 | Micron Technology, Inc. | Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures |
| US8507966B2 (en) | 2010-03-02 | 2013-08-13 | Micron Technology, Inc. | Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same |
| US9646869B2 (en) | 2010-03-02 | 2017-05-09 | Micron Technology, Inc. | Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices |
| US8288795B2 (en) | 2010-03-02 | 2012-10-16 | Micron Technology, Inc. | Thyristor based memory cells, devices and systems including the same and methods for forming the same |
| DE102010035489A1 (de) * | 2010-08-26 | 2012-03-01 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelement |
| US9023721B2 (en) | 2010-11-23 | 2015-05-05 | Soitec | Methods of forming bulk III-nitride materials on metal-nitride growth template layers, and structures formed by such methods |
| FR2968830B1 (fr) | 2010-12-08 | 2014-03-21 | Soitec Silicon On Insulator | Couches matricielles ameliorees pour le depot heteroepitaxial de materiaux semiconducteurs de nitrure iii en utilisant des procedes hvpe |
| FR2968678B1 (fr) | 2010-12-08 | 2015-11-20 | Soitec Silicon On Insulator | Procédés pour former des matériaux a base de nitrure du groupe iii et structures formées par ces procédés |
| US8753942B2 (en) | 2010-12-01 | 2014-06-17 | Intel Corporation | Silicon and silicon germanium nanowire structures |
| US8952418B2 (en) | 2011-03-01 | 2015-02-10 | Micron Technology, Inc. | Gated bipolar junction transistors |
| US8519431B2 (en) | 2011-03-08 | 2013-08-27 | Micron Technology, Inc. | Thyristors |
| JP5802436B2 (ja) * | 2011-05-30 | 2015-10-28 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| US9105469B2 (en) | 2011-06-30 | 2015-08-11 | Piquant Research Llc | Defect mitigation structures for semiconductor devices |
| US9127345B2 (en) | 2012-03-06 | 2015-09-08 | Asm America, Inc. | Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent |
| US9171715B2 (en) | 2012-09-05 | 2015-10-27 | Asm Ip Holding B.V. | Atomic layer deposition of GeO2 |
| CN102916039B (zh) * | 2012-10-19 | 2016-01-20 | 清华大学 | 具有氧化铍的半导体结构 |
| US9218963B2 (en) | 2013-12-19 | 2015-12-22 | Asm Ip Holding B.V. | Cyclical deposition of germanium |
| WO2017019096A1 (en) * | 2015-07-30 | 2017-02-02 | Halliburton Energy Services, Inc. | Integrated computational elements incorporating a stress relief layer |
| KR102514785B1 (ko) * | 2017-05-19 | 2023-03-29 | 상라오 징코 솔라 테크놀러지 디벨롭먼트 컴퍼니, 리미티드 | 태양 전지 및 이의 제조 방법 |
| US12006570B2 (en) * | 2017-08-31 | 2024-06-11 | Uchicago Argonne, Llc | Atomic layer deposition for continuous, high-speed thin films |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5159413A (en) * | 1990-04-20 | 1992-10-27 | Eaton Corporation | Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate |
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| JP2001102555A (ja) | 1999-09-30 | 2001-04-13 | Seiko Epson Corp | 半導体装置、薄膜トランジスタ及びそれらの製造方法 |
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| JPS63305529A (ja) * | 1987-06-05 | 1988-12-13 | Nippon Telegr & Teleph Corp <Ntt> | 基板およびその製造方法 |
| JPS6436046A (en) * | 1987-07-31 | 1989-02-07 | Seiko Epson Corp | Manufacture of semiconductor device |
| US4935382A (en) * | 1987-10-30 | 1990-06-19 | American Telephone And Telegraph Company | Method of making a semiconductor-insulator-semiconductor structure |
| US5256550A (en) * | 1988-11-29 | 1993-10-26 | Hewlett-Packard Company | Fabricating a semiconductor device with strained Si1-x Gex layer |
| US5310696A (en) * | 1989-06-16 | 1994-05-10 | Massachusetts Institute Of Technology | Chemical method for the modification of a substrate surface to accomplish heteroepitaxial crystal growth |
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- 2003-05-07 US US10/434,423 patent/US7452757B2/en not_active Expired - Lifetime
- 2003-05-07 WO PCT/US2003/014314 patent/WO2003096385A2/en not_active Ceased
- 2003-05-07 EP EP03728753A patent/EP1502285A2/en not_active Withdrawn
- 2003-05-07 KR KR1020047017791A patent/KR101023034B1/ko not_active Expired - Lifetime
- 2003-05-07 JP JP2004504268A patent/JP4951202B2/ja not_active Expired - Lifetime
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| US5159413A (en) * | 1990-04-20 | 1992-10-27 | Eaton Corporation | Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate |
| US5478653A (en) * | 1994-04-04 | 1995-12-26 | Guenzer; Charles S. | Bismuth titanate as a template layer for growth of crystallographically oriented silicon |
| JP2001102555A (ja) | 1999-09-30 | 2001-04-13 | Seiko Epson Corp | 半導体装置、薄膜トランジスタ及びそれらの製造方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR102871969B1 (ko) | 2024-05-14 | 2025-10-15 | 연세대학교 산학협력단 | 결정성 채널층을 포함하는 반도체 소자 및 이의 제조방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1502285A2 (en) | 2005-02-02 |
| JP4951202B2 (ja) | 2012-06-13 |
| KR20050007472A (ko) | 2005-01-18 |
| US7452757B2 (en) | 2008-11-18 |
| US20040097022A1 (en) | 2004-05-20 |
| WO2003096385A3 (en) | 2004-07-29 |
| WO2003096385A2 (en) | 2003-11-20 |
| JP2005524987A (ja) | 2005-08-18 |
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