KR100869985B1 - 반도체 기억 장치 - Google Patents

반도체 기억 장치 Download PDF

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Publication number
KR100869985B1
KR100869985B1 KR1020020072656A KR20020072656A KR100869985B1 KR 100869985 B1 KR100869985 B1 KR 100869985B1 KR 1020020072656 A KR1020020072656 A KR 1020020072656A KR 20020072656 A KR20020072656 A KR 20020072656A KR 100869985 B1 KR100869985 B1 KR 100869985B1
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KR
South Korea
Prior art keywords
clock signal
phase
circuit
data
adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020020072656A
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English (en)
Korean (ko)
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KR20030087902A (ko
Inventor
오쿠다마사키
고바야시히로유키
Original Assignee
후지쯔 마이크로일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 후지쯔 마이크로일렉트로닉스 가부시키가이샤 filed Critical 후지쯔 마이크로일렉트로닉스 가부시키가이샤
Publication of KR20030087902A publication Critical patent/KR20030087902A/ko
Application granted granted Critical
Publication of KR100869985B1 publication Critical patent/KR100869985B1/ko
Assigned to 가부시키가이샤 소시오넥스트 reassignment 가부시키가이샤 소시오넥스트 권리의 전부이전등록 Assignors: 후지쯔 세미컨덕터 가부시키가이샤
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56012—Timing aspects, clock generation, synchronisation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR1020020072656A 2002-05-09 2002-11-21 반도체 기억 장치 Expired - Fee Related KR100869985B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2002-00134073 2002-05-09
JP2002134073A JP2003331577A (ja) 2002-05-09 2002-05-09 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR20030087902A KR20030087902A (ko) 2003-11-15
KR100869985B1 true KR100869985B1 (ko) 2008-11-21

Family

ID=29397444

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020072656A Expired - Fee Related KR100869985B1 (ko) 2002-05-09 2002-11-21 반도체 기억 장치

Country Status (5)

Country Link
US (1) US6667913B2 (https=)
JP (1) JP2003331577A (https=)
KR (1) KR100869985B1 (https=)
CN (3) CN100538880C (https=)
TW (1) TW578153B (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4271623B2 (ja) * 2004-06-17 2009-06-03 富士通株式会社 クロック調整装置および方法
DE102004044721B4 (de) * 2004-09-15 2013-11-14 Qimonda Ag Selbsttest für die Phasenlage des Datenleseclocksignals DQS
JP4808414B2 (ja) * 2005-01-31 2011-11-02 富士通株式会社 コンピュータシステム及びメモリシステム
CN100550199C (zh) * 2006-09-20 2009-10-14 南亚科技股份有限公司 存储器控制电路与方法
KR100834401B1 (ko) * 2007-01-08 2008-06-04 주식회사 하이닉스반도체 반도체 메모리 소자와 그의 구동 방법
KR101006088B1 (ko) * 2009-06-04 2011-01-06 주식회사 하이닉스반도체 데이터 전달의 신뢰성을 보장하기 위한 반도체 메모리 장치 및 이를 포함하는 반도체 시스템
JP2010282511A (ja) * 2009-06-05 2010-12-16 Elpida Memory Inc メモリモジュール及びこれを備えるメモリシステム
CN102280129B (zh) * 2010-06-09 2014-12-17 上海华虹宏力半导体制造有限公司 闪速存储器及其读取电路
JP2012043510A (ja) 2010-08-20 2012-03-01 Elpida Memory Inc 半導体装置およびその制御方法
JP6596051B2 (ja) * 2016-10-28 2019-10-23 インテグレイテッド シリコン ソリューション インコーポレイテッド 同期半導体集積回路内のクロック式指令タイミング調節
JP7195913B2 (ja) 2018-12-19 2022-12-26 キオクシア株式会社 半導体記憶装置
KR102754270B1 (ko) * 2019-03-05 2025-01-14 에스케이하이닉스 주식회사 반도체장치
KR102849290B1 (ko) * 2020-08-21 2025-08-25 삼성전자주식회사 반도체 장치 및 메모리 시스템
CN114489233B (zh) * 2022-01-24 2024-06-11 上海华力集成电路制造有限公司 一种相位可调任意波形发生器
CN114938258B (zh) * 2022-07-25 2022-10-14 星河动力(北京)空间科技有限公司 火箭控制时钟同步装置、飞行控制器和箭上控制计算机

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5062081A (en) * 1989-10-10 1991-10-29 Advanced Micro Devices, Inc. Multiport memory collision/detection circuitry
KR20000009360A (ko) * 1998-07-23 2000-02-15 김철근 미꾸라지 성장 호르몬 발현 벡터
KR20010006700A (ko) * 1999-06-25 2001-01-26 아끼구사 나오유끼 반도체 장치
JP2001195149A (ja) * 2000-01-17 2001-07-19 Mitsubishi Electric Corp 内部クロック信号発生回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3631277B2 (ja) * 1995-01-27 2005-03-23 株式会社日立製作所 メモリモジュール
JP3703241B2 (ja) * 1997-01-28 2005-10-05 Ｎｅｃエレクトロニクス株式会社 半導体メモリ装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5062081A (en) * 1989-10-10 1991-10-29 Advanced Micro Devices, Inc. Multiport memory collision/detection circuitry
KR20000009360A (ko) * 1998-07-23 2000-02-15 김철근 미꾸라지 성장 호르몬 발현 벡터
KR20010006700A (ko) * 1999-06-25 2001-01-26 아끼구사 나오유끼 반도체 장치
JP2001195149A (ja) * 2000-01-17 2001-07-19 Mitsubishi Electric Corp 内部クロック信号発生回路

Also Published As

Publication number Publication date
CN1674150A (zh) 2005-09-28
CN1674149A (zh) 2005-09-28
TW578153B (en) 2004-03-01
US6667913B2 (en) 2003-12-23
TW200306574A (en) 2003-11-16
US20030210577A1 (en) 2003-11-13
CN100538880C (zh) 2009-09-09
CN100511472C (zh) 2009-07-08
KR20030087902A (ko) 2003-11-15
JP2003331577A (ja) 2003-11-21
CN1457100A (zh) 2003-11-19
CN1212666C (zh) 2005-07-27

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