KR100850087B1 - 구리배선의 전도도 향상을 위한 식각 방법 - Google Patents
구리배선의 전도도 향상을 위한 식각 방법 Download PDFInfo
- Publication number
- KR100850087B1 KR100850087B1 KR1020060135523A KR20060135523A KR100850087B1 KR 100850087 B1 KR100850087 B1 KR 100850087B1 KR 1020060135523 A KR1020060135523 A KR 1020060135523A KR 20060135523 A KR20060135523 A KR 20060135523A KR 100850087 B1 KR100850087 B1 KR 100850087B1
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- copper wiring
- nitride film
- oxide film
- conductivity
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000005530 etching Methods 0.000 title claims abstract description 42
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 38
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 37
- 239000010949 copper Substances 0.000 title claims abstract description 37
- 239000004065 semiconductor Substances 0.000 title description 3
- 150000004767 nitrides Chemical class 0.000 claims abstract description 30
- 230000009977 dual effect Effects 0.000 claims abstract description 16
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 229910052751 metal Inorganic materials 0.000 description 20
- 239000002184 metal Substances 0.000 description 20
- 239000010410 layer Substances 0.000 description 9
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- -1 copper nitride Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (5)
- 삭제
- 듀얼 다마신 공정에 의해 구리배선 및 비아를 형성하기 위하여 식각된 산화막을 마스크로 하여 질화막을 식각하는 방법에 있어서, 상기 질화막 식각 조건을 조절하여 상기 산화막 표면의 조도를 증가시키며,상기 질화막 식각 조건은 질화막에 대한 산화막의 식각률이 1.3 ~1.6 범위인 질화막 식각 방법.
- 제2항에 있어서, 상기 질화막 식각을 위한 식각 가스로 CHF3, CF4 및 N2 가스를 사용하여 80mTorr ~ 90mTorr의 공정 압력에서 식각을 수행하며,상기 CHF3의 공급유량은 20sccm ~ 30 sccm 범위이고, CF4의 공급유량은 3sccm ~ 7sccm범위 이고, N2의 공급유량은 100sccm ~ 200sccm 범위이며,상기 질화막 식각시 플라즈마 발생을 위한 상부 전극의 파워는 300W ~ 500W인 것을 특징으로 하는 질화막 식각 방법.
- 삭제
- 삭제
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060135523A KR100850087B1 (ko) | 2006-12-27 | 2006-12-27 | 구리배선의 전도도 향상을 위한 식각 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060135523A KR100850087B1 (ko) | 2006-12-27 | 2006-12-27 | 구리배선의 전도도 향상을 위한 식각 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20080060901A KR20080060901A (ko) | 2008-07-02 |
KR100850087B1 true KR100850087B1 (ko) | 2008-08-04 |
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KR1020060135523A KR100850087B1 (ko) | 2006-12-27 | 2006-12-27 | 구리배선의 전도도 향상을 위한 식각 방법 |
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KR (1) | KR100850087B1 (ko) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030023299A (ko) | 2001-09-13 | 2003-03-19 | 주성엔지니어링(주) | SiLK 이중 다마신 공정 |
KR20030058286A (ko) | 2001-12-31 | 2003-07-07 | 주식회사 하이닉스반도체 | 듀얼다마신공정을 이용한 금속배선 형성 방법 |
KR20040006480A (ko) | 2002-07-12 | 2004-01-24 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 스페이서 형성방법 |
KR20040068582A (ko) * | 2001-12-12 | 2004-07-31 | 어플라이드 머티어리얼즈 인코포레이티드 | 유전체층의 선택적 에칭 방법 |
-
2006
- 2006-12-27 KR KR1020060135523A patent/KR100850087B1/ko not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030023299A (ko) | 2001-09-13 | 2003-03-19 | 주성엔지니어링(주) | SiLK 이중 다마신 공정 |
KR20040068582A (ko) * | 2001-12-12 | 2004-07-31 | 어플라이드 머티어리얼즈 인코포레이티드 | 유전체층의 선택적 에칭 방법 |
KR20030058286A (ko) | 2001-12-31 | 2003-07-07 | 주식회사 하이닉스반도체 | 듀얼다마신공정을 이용한 금속배선 형성 방법 |
KR20040006480A (ko) | 2002-07-12 | 2004-01-24 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 스페이서 형성방법 |
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KR20080060901A (ko) | 2008-07-02 |
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