KR100793669B1 - 반도체 기억 장치 - Google Patents
반도체 기억 장치 Download PDFInfo
- Publication number
- KR100793669B1 KR100793669B1 KR1020010072248A KR20010072248A KR100793669B1 KR 100793669 B1 KR100793669 B1 KR 100793669B1 KR 1020010072248 A KR1020010072248 A KR 1020010072248A KR 20010072248 A KR20010072248 A KR 20010072248A KR 100793669 B1 KR100793669 B1 KR 100793669B1
- Authority
- KR
- South Korea
- Prior art keywords
- subblock
- data
- address
- subblocks
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4062—Parity or ECC in refresh operations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001096343A JP4001724B2 (ja) | 2001-03-29 | 2001-03-29 | 半導体記憶装置 |
| JPJP-P-2001-00096343 | 2001-03-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020077021A KR20020077021A (ko) | 2002-10-11 |
| KR100793669B1 true KR100793669B1 (ko) | 2008-01-10 |
Family
ID=18950267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010072248A Expired - Fee Related KR100793669B1 (ko) | 2001-03-29 | 2001-11-20 | 반도체 기억 장치 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6529435B2 (enExample) |
| EP (1) | EP1246194B1 (enExample) |
| JP (1) | JP4001724B2 (enExample) |
| KR (1) | KR100793669B1 (enExample) |
| CN (1) | CN1379409A (enExample) |
| DE (1) | DE60141945D1 (enExample) |
| TW (1) | TW525164B (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4712214B2 (ja) * | 2001-04-09 | 2011-06-29 | 富士通セミコンダクター株式会社 | 半導体メモリの動作制御方法および半導体メモリ |
| JP4782302B2 (ja) * | 2001-04-18 | 2011-09-28 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
| JP4768163B2 (ja) | 2001-08-03 | 2011-09-07 | 富士通セミコンダクター株式会社 | 半導体メモリ |
| KR100481820B1 (ko) * | 2002-09-26 | 2005-04-11 | (주)실리콘세븐 | 패러티로서 비유효한 출력 데이터를 보정하는 에스램 호한메모리와 그 구동방법 |
| WO2005017914A1 (ja) * | 2003-08-18 | 2005-02-24 | Fujitsu Limited | 半導体メモリおよび半導体メモリの動作方法 |
| JP4275033B2 (ja) * | 2004-08-23 | 2009-06-10 | Necエレクトロニクス株式会社 | 半導体記憶装置とテスト回路及び方法 |
| US7492656B2 (en) * | 2006-04-28 | 2009-02-17 | Mosaid Technologies Incorporated | Dynamic random access memory with fully independent partial array refresh function |
| KR100852191B1 (ko) | 2007-02-16 | 2008-08-13 | 삼성전자주식회사 | 에러 정정 기능을 가지는 반도체 메모리 장치 및 에러 정정방법 |
| US8583987B2 (en) | 2010-11-16 | 2013-11-12 | Micron Technology, Inc. | Method and apparatus to perform concurrent read and write memory operations |
| WO2014113572A1 (en) * | 2013-01-16 | 2014-07-24 | Maxlinear, Inc. | Dynamic random access memory for communications systems |
| KR20160023274A (ko) * | 2014-08-22 | 2016-03-03 | 에스케이하이닉스 주식회사 | 메모리 장치 및 이를 포함하는 메모리 시스템 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000353383A (ja) * | 1999-04-09 | 2000-12-19 | Toshiba Corp | ダイナミック型半導体記憶装置、及び、半導体集積回路装置 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6211977A (ja) * | 1985-07-10 | 1987-01-20 | Toshiba Corp | 画像メモリ |
| JPH0612613B2 (ja) * | 1986-03-18 | 1994-02-16 | 富士通株式会社 | 半導体記憶装置 |
| US5430681A (en) * | 1989-05-08 | 1995-07-04 | Hitachi Maxell, Ltd. | Memory cartridge and its memory control method |
| EP0424301A3 (en) * | 1989-10-18 | 1992-09-16 | International Business Machines Corporation | Overlapped data scrubbing with data refreshing |
| US6108229A (en) * | 1996-05-24 | 2000-08-22 | Shau; Jeng-Jye | High performance embedded semiconductor memory device with multiple dimension first-level bit-lines |
| JP3862333B2 (ja) * | 1996-12-10 | 2006-12-27 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| JP2000067595A (ja) * | 1998-06-09 | 2000-03-03 | Mitsubishi Electric Corp | 半導体記憶装置 |
-
2001
- 2001-03-29 JP JP2001096343A patent/JP4001724B2/ja not_active Expired - Fee Related
- 2001-10-26 TW TW090126620A patent/TW525164B/zh not_active IP Right Cessation
- 2001-11-20 CN CN01130510A patent/CN1379409A/zh active Pending
- 2001-11-20 EP EP01309750A patent/EP1246194B1/en not_active Expired - Lifetime
- 2001-11-20 KR KR1020010072248A patent/KR100793669B1/ko not_active Expired - Fee Related
- 2001-11-20 DE DE60141945T patent/DE60141945D1/de not_active Expired - Lifetime
- 2001-12-04 US US10/000,313 patent/US6529435B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000353383A (ja) * | 1999-04-09 | 2000-12-19 | Toshiba Corp | ダイナミック型半導体記憶装置、及び、半導体集積回路装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020077021A (ko) | 2002-10-11 |
| US20020141270A1 (en) | 2002-10-03 |
| CN1379409A (zh) | 2002-11-13 |
| JP4001724B2 (ja) | 2007-10-31 |
| JP2002298578A (ja) | 2002-10-11 |
| US6529435B2 (en) | 2003-03-04 |
| TW525164B (en) | 2003-03-21 |
| EP1246194B1 (en) | 2010-04-28 |
| DE60141945D1 (de) | 2010-06-10 |
| EP1246194A2 (en) | 2002-10-02 |
| EP1246194A3 (en) | 2003-09-03 |
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St.27 status event code: A-5-5-P10-P19-oth-PG1701 Patent document republication publication date: 20080414 Republication note text: Request for Correction Notice (Document Request) Gazette number: 1007936690000 Gazette reference publication date: 20080110 |
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